80C186EB/80C188EB Microprocessor User's Manual - CEUNES

OVERVIEW OF THE 80C186 FAMILY ARCHITECTUREThe data registers can be addressed by their upper or lower halves. Each data register can be usedinterchangeably as a 16-bit register or two 8-bit registers. The pointer registers are always accessedas 16-bit values. The CPU can use data registers without constraint in most arithmetic and logicoperations. Arithmetic and logic operations can also use the pointer and index registers. Someinstructions use certain registers implicitly (see Table 2-1), allowing compact encoding.Table 2-1. Implicit Use of General RegistersRegisterAXALAHBXCXCLDXSPSIDIOperationsWord Multiply, Word Divide, Word I/OByte Multiply, Byte Divide, Byte I/O, Translate, Decimal ArithmeticByte Multiply, Byte DivideTranslateString Operations, LoopsVariable Shift and RotateWord Multiply, Word Divide, Indirect I/OStack OperationsString OperationsString OperationsThe contents of the general-purpose registers are undefined following a processor reset.2.1.4 Segment RegistersThe 80C186 Modular Core family memory space is 1 Mbyte in size and divided into logical segmentsof up to 64 Kbytes each. The CPU has direct access to four segments at a time. The segmentregisters contain the base addresses (starting locations) of these memory segments (see Figure2-4). The CS register points to the current code segment, which contains instructions to befetched. The SS register points to the current stack segment, which is used for all stack operations.The DS register points to the current data segment, which generally contains program variables.The ES register points to the current extra segment, which is typically used for data storage. TheCS register initializes to 0FFFFH, and the SS, DS and ES registers initialize to 0000H. Programscan access and manipulate the segment registers with several instructions.2-5