80C186EB/80C188EB Microprocessor User's Manual - CEUNES

CLOCK GENERATION AND POWER MANAGEMENTAn important consideration when using crystals is that the oscillator start correctly over the voltageand temperature ranges expected in operation. Observe oscillator startup in the laboratory.Varying the load capacitors (within about ± 50%) can optimize startup characteristics versus stability.In your experiments, consider stray capacitance and scope loading effects.For help in selecting external oscillator components for unusual circumstances, count on the crystalmanufacturer as your best resource. Using low-cost ceramic resonators in place of crystals ispossible if your application will tolerate less precise frequencies.5.1.2 Using an External OscillatorThe microprocessor’s on-board clock oscillator allows the use of a relatively low cost crystal.However, the designer may also use a “canned oscillator” or other external frequency source.Connect the external frequency input (EFI) signal directly to the oscillator CLKIN input. LeaveOSCOUT unconnected. This oscillator input drives the internal divide-by-two counter directly,generating the CPU clock signals. The external frequency input can have practically any duty cycle,provided it meets the minimum high and low times stated in the data sheet. Selecting an externalclock oscillator is more straightforward than selecting a crystal.5.1.3 Output from the Clock GeneratorThe crystal oscillator output drives a divide-by-two circuit, generating a 50% duty cycle clock forthe processor’s integrated components. All processor timings refer to this clock, available externallyat the CLKOUT pin. CLKOUT changes state on the high-to-low transition of the CLKINsignal, even during reset and bus hold. CLKOUT is also available during Idle mode, but not duringPowerdown mode. (See “Idle Mode” on page 5-11 and “Powerdown Mode” on page 5-16.)In a CMOS circuit, significant current flows only during logic level transitions. Since the microprocessorconsists mostly of clocked circuitry, the clock distribution is the basis of power management.5.1.4 Reset and Clock SynchronizationThe clock generator provides a system reset signal (RESOUT). The RESIN input generates RE-SOUT and the clock generator synchronizes it to the CLKOUT signal.A Schmitt trigger in the RESIN input ensures that the switch point for a low-to-high transition isgreater than the switch point for a high-to-low transition. The processor must remain in reset aminimum of 4 CLKOUT cycles after V CC and CLKOUT stabilize. The hysteresis allows a simpleRC circuit to drive the RESIN input (see Figure 5-5). Typical applications can use about 100 millisecondsas an RC time constant.5-6