80C186EB/80C188EB Microprocessor User's Manual - CEUNES

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SerialCommunicationsUnit10
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80C186EB/80C188EBMicroprocessorUser
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Information in this document is pro
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CONTENTS2.3.2 Software Interrupts .
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CONTENTS6.4.4 Enabling and Disablin
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CONTENTS10.2.2 Asynchronous Mode Pr
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CONTENTSFIGURESFigurePage2-1 Simpli
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CONTENTSFIGURESFigurePage6-9 Using
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CONTENTSTableTABLESPage1-1 Comparis
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CONTENTSEXAMPLESExamplePage5-1 Init
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CHAPTER 1INTRODUCTIONThe 8086 micro
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INTRODUCTIONEach chapter covers a s
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INTRODUCTION1.3.1 How to Use Intel'
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Overview of the80C186 FamilyArchite
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OVERVIEW OF THE 80C186 FAMILY ARCHI
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Bus Interface Unit3
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BUS INTERFACE UNITPhysical Implemen
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BUS INTERFACE UNIT(X + 1)(X)A19:1 D
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BUS INTERFACE UNITFor word transfer
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BUS INTERFACE UNITCLKOUTT4 T1 T2 T3
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BUS INTERFACE UNITCLKOUTT4or TI T1
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BUS INTERFACE UNITSignals From CPU4
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BUS INTERFACE UNITT2T3or TWT4or TIC
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BUS INTERFACE UNITA normally not-re
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BUS INTERFACE UNITT2or T3or TWT3or
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BUS INTERFACE UNITAn idle bus state
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BUS INTERFACE UNIT3.5.1.1 Refresh B
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BUS INTERFACE UNITMost memory and p
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BUS INTERFACE UNITCLKOUTT4 T2 T3 TI
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BUS INTERFACE UNIT3.5.4 HALT Bus Cy
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BUS INTERFACE UNITCLKOUTT1 TI TIALE
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BUS INTERFACE UNITCLKOUTALES2:0AD15
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BUS INTERFACE UNITCLKOUTNMI/INTxNot
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BUS INTERFACE UNITALEProcessorA19:1
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BUS INTERFACE UNITThe WAIT instruct
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BUS INTERFACE UNITCLKOUTHOLD124HLDA
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BUS INTERFACE UNITCLKOUT1 3 4HOLDHL
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BUS INTERFACE UNITCLKOUTHOLD12345HL
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Peripheral ControlBlock4
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PERIPHERAL CONTROL BLOCKRegister Na
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PERIPHERAL CONTROL BLOCK4.3 RESERVE
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PERIPHERAL CONTROL BLOCK4.4.3.1 Wri
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PERIPHERAL CONTROL BLOCK4-8
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CHAPTER 5CLOCK GENERATION AND POWER
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CLOCK GENERATION AND POWER MANAGEME
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Chip-Select Unit6
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CHIP-SELECT UNIT27C25674AC138A1:13A
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CHIP-SELECT UNITT4 T1 T2 T3T4CLKOUT
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CHIP-SELECT UNITThe START register
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CHIP-SELECT UNITRegister Name:Regis
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CHIP-SELECT UNIT6.4.2 Start Address
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CHIP-SELECT UNITBUS READYREADY Cont
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CHIP-SELECT UNITTable 6-3 lists exa
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CHIP-SELECT UNITREADYALEA19:16AD15:
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CHIP-SELECT UNITDRAM_BASEEQU 128 ;W
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CHIP-SELECT UNIT; DATA SEGMENTDATAS
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CHAPTER 7REFRESH CONTROL UNITThe Re
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REFRESH CONTROL UNITRefresh Control
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REFRESH CONTROL UNIT7.5 REFRESH BUS
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REFRESH CONTROL UNIT7.7 PROGRAMMING
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REFRESH CONTROL UNITRegister Name:R
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REFRESH CONTROL UNITRegister Name:R
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REFRESH CONTROL UNITmov dx, RFBASEm
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Interrupt ControlUnit8
Page 199 and 200: INTERRUPT CONTROL UNITTimer 0 Timer
Page 201 and 202: INTERRUPT CONTROL UNITInterrupt sou
Page 203 and 204: INTERRUPT CONTROL UNIT8.2.2.1 Prior
Page 205 and 206: INTERRUPT CONTROL UNITINTINT08259Ao
Page 207 and 208: INTERRUPT CONTROL UNIT8.2.6 Edge an
Page 209 and 210: INTERRUPT CONTROL UNITTable 8-3. In
Page 211 and 212: INTERRUPT CONTROL UNIT.Register Nam
Page 213 and 214: INTERRUPT CONTROL UNIT8.3.2 Interru
Page 215 and 216: INTERRUPT CONTROL UNIT8.3.4 Priorit
Page 217 and 218: INTERRUPT CONTROL UNITReading the P
Page 219 and 220: INTERRUPT CONTROL UNITRegister Name
Page 221 and 222: INTERRUPT CONTROL UNIT3. Program th
Page 224 and 225: CHAPTER 9TIMER/COUNTER UNITThe Time
Page 226 and 227: TIMER/COUNTER UNITTimer 0 Timer 1 T
Page 228 and 229: TIMER/COUNTER UNITContinued From"A"
Page 230 and 231: TIMER/COUNTER UNITRegister Name:Reg
Page 236 and 237: TIMER/COUNTER UNITThe timer countin
Page 238 and 239: TIMER/COUNTER UNITTimer 0Serviced1I
Page 240 and 241: TIMER/COUNTER UNIT9.3.2 Synchroniza
Page 242 and 243: TIMER/COUNTER UNITlib_80186 segment
Page 244 and 245: TIMER/COUNTER UNIT$mod186nameexampl
Page 246 and 247: TIMER/COUNTER UNIT_CMPB equ word pt
Page 250 and 251: CHAPTER 10SERIAL COMMUNICATIONS UNI
Page 252 and 253: SERIAL COMMUNICATIONS UNITReception
Page 254 and 255: SERIAL COMMUNICATIONS UNITSxTBUFFro
Page 256 and 257: SERIAL COMMUNICATIONS UNITTXD/RXD1
Page 258 and 259: SERIAL COMMUNICATIONS UNIT10.2 PROG
Page 260 and 261: SERIAL COMMUNICATIONS UNITRegister
Page 262 and 263: SERIAL COMMUNICATIONS UNITDue to in
Page 268 and 269: SERIAL COMMUNICATIONS UNITThe CPU s
Page 270 and 271: SERIAL COMMUNICATIONS UNIT10.3.3.2
Page 272 and 273: SERIAL COMMUNICATIONS UNIT10.5 SERI
Page 274 and 275: SERIAL COMMUNICATIONS UNITmov dx, S
Page 276 and 277: SERIAL COMMUNICATIONS UNITmov dx, P
Page 278 and 279: SERIAL COMMUNICATIONS UNIT$mod186na
Page 280 and 281: SERIAL COMMUNICATIONS UNITmov dx, S
Page 282 and 283: SERIAL COMMUNICATIONS UNITDisconnec
Page 284 and 285: SERIAL COMMUNICATIONS UNIT$mod186na
Page 286: Input/Output Ports11
Page 289 and 290: INPUT/OUTPUT PORTSFrom IntegratedPe
Page 291 and 292: INPUT/OUTPUT PORTSFrom IntegratedPe
Page 293 and 294: INPUT/OUTPUT PORTSFrom PortDirectio
Page 295 and 296: INPUT/OUTPUT PORTS11.2.1 Port Contr
Page 297 and 298: INPUT/OUTPUT PORTSRegister Name:Reg
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INPUT/OUTPUT PORTS11.3 PROGRAMMING
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CHAPTER 12MATH COPROCESSINGThe 80C1
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MATH COPROCESSING12.3.1.1 Data Tran
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MATH COPROCESSING12.3.1.3 Compariso
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MATH COPROCESSING12.3.2 80C187 Data
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MATH COPROCESSINGExternalOscillator
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MATH COPROCESSINGBus cycles involvi
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MATH COPROCESSING12.4.4 Exception T
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MATH COPROCESSING$mod186name exampl
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ONCE Mode13
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ONCE MODE13-2
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APPENDIX A80C186 INSTRUCTION SETADD
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80C186 INSTRUCTION SET ADDITIONS AN
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InputSynchronizationB
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INPUT SYNCHRONIZATIONA synchronizat
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APPENDIX CINSTRUCTION SET DESCRIPTI
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INSTRUCTION SET DESCRIPTIONSTable C
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INSTRUCTION SET DESCRIPTIONSNEGNOPN
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INSTRUCTION SET DESCRIPTIONSSHRSTCS
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Instruction SetOpcodes and ClockCyc
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INSTRUCTION SET OPCODES AND CLOCK C
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INDEX80C187 Math Coprocessor, 12-2-
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INDEXData transfers, 3-1-3-6instruc
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INDEXlogical, 2-10, 2-12offset valu
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INDEXSHR instruction, A-9SI registe
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