80C186EB/80C188EB Microprocessor User's Manual - CEUNES

CHAPTER 2OVERVIEW OF THE 80C186 FAMILYARCHITECTUREThe 80C186 Modular Microprocessor Core shares a common base architecture with the 8086,8088, 80186, 80188, 80286, Intel386 and Intel486 processors. The 80C186 Modular Coremaintains full object-code compatibility with the 8086/8088 family of 16-bit microprocessors,while adding hardware and software performance enhancements. Most instructions require fewerclocks to execute on the 80C186 Modular Core because of hardware enhancements in the BusInterface Unit and the Execution Unit. Several additional instructions simplify programming andreduce code size (see Appendix A, “80C186 Instruction Set Additions and Extensions”).2.1 ARCHITECTURAL OVERVIEWThe 80C186 Modular Microprocessor Core incorporates two separate processing units: an ExecutionUnit (EU) and a Bus Interface Unit (BIU). The Execution Unit is functionally identicalamong all family members. The Bus Interface Unit is configured for a 16-bit external data busfor the 80C186 core and an 8-bit external data bus for the 80C188 core. The two units interfacevia an instruction prefetch queue.The Execution Unit executes instructions; the Bus Interface Unit fetches instructions, reads operandsand writes results. Whenever the Execution Unit requires another opcode byte, it takes thebyte out of the prefetch queue. The two units can operate independently of one another and areable, under most circumstances, to overlap instruction fetches and execution.The 80C186 Modular Core family has a 16-bit Arithmetic Logic Unit (ALU). The ArithmeticLogic Unit performs 8-bit or 16-bit arithmetic and logical operations. It provides for data movementbetween registers, memory and I/O space.The 80C186 Modular Core family CPU allows for high-speed data transfer from one area ofmemory to another using string move instructions and between an I/O port and memory usingblock I/O instructions. The CPU also provides many conditional branch and control instructions.The 80C186 Modular Core architecture features 14 basic registers grouped as general registers,segment registers, pointer registers and status and control registers. The four 16-bit general-purposeregisters (AX, BX, CX and DX) can be used as operands for most arithmetic operations aseither 8- or 16-bit units. The four 16-bit pointer registers (SI, DI, BP and SP) can be used in arithmeticoperations and in accessing memory-based variables. Four 16-bit segment registers (CS,DS, SS and ES) allow simple memory partitioning to aid modular programming. The status andcontrol registers consist of an Instruction Pointer (IP) and the Processor Status Word (PSW) register,which contains flag bits. Figure 2-1 is a simplified CPU block diagram.2-1