i A PHYSICAL IMPLEMENTATION WITH CUSTOM LOW POWER ...

The use of delay elements in the hardware fabric requires that the delay elements have a
wide delay range. Also, as the delay elements are used to enable latches, which are in the critical
path of the design, increase in the delay value can cause performance degradation while a
decrease in the delay value can cause an increase in the glitch power. Variations in delay values
are considerable with supply voltage, temperature and process variations. Hence, a delay element
which is less sensitive to these variations is essential to reduce power in the hardware fabric with
minimal performance degradation.
6.3 THYRISTOR BASED DELAY ELEMENT
The need for a delay element with a low power characteristic and low supply and temperature
variation was the driving factor in the use of the CMOS thyristor based delay element. In
addition, this delay element also possesses good signal integrity. The thyristor based delay
element as proposed by [17] is less sensitive to voltage and temperature variations as the major
component of the delay is controlled by the current source.
6.3.1 CMOS Thyristor Concept
The working of the thyristor based delay element is based on the principle described below.
Consider the circuit as shown in Figure 6-13. Let node Q~ be charged to Vdd and node Q be
discharged to ground in the beginning. This assumption is valid as can be seen in the dynamic
triggered delay element design. Let Penable be asserted high and Nenable be asserted low. When
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