i A PHYSICAL IMPLEMENTATION WITH CUSTOM LOW POWER ...

Figure 7-9: IV Characteristics of a written FLOTOX transistor
During the erase operation, the voltage on the floating gate node follows the gate control
voltage until electrons get injected because of Fowler-Nordheim tunneling [20]. At the onset of
tunneling, the floating gate voltage begins to decrease. Once the erase operation is completed by
setting the gate control voltage to zero volts, the floating gate potential reaches a negative value
depending on the amount of charges trapped on the floating gate [20]. The floating gate behavior
is similar during a write operation.
7.2 EEPROM MEMORY ARCHITECTURE
The EEPROM memory in addition to the FLOTOX transistor requires special circuits for its
operation. Some components of the design are similar to the SRAM (Static Random Access
Memory) array while most of them are different. The following components are a part of the
EEPROM array:
123