i A PHYSICAL IMPLEMENTATION WITH CUSTOM LOW POWER ...
i A PHYSICAL IMPLEMENTATION WITH CUSTOM LOW POWER ...
i A PHYSICAL IMPLEMENTATION WITH CUSTOM LOW POWER ...
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6.0 DELAY ELEMENTS FOR <strong>LOW</strong> <strong>POWER</strong> FABRIC<br />
Delay elements are circuits that introduce a specific delay between the input and the output.<br />
Delay elements are widely used in asynchronous or self-timed digital systems. For a self-timed<br />
system, the delay element generates a task-complete signal to flag the completion of the task<br />
[11][12].Delay elements are also used in circuits that perform mathematical computations like<br />
the Discrete Cosine Transform [11] [13]. Delay elements are also used in Phase Locked<br />
Loops(PLLs) and Delay Locked Loops (DLL) [11] [14].<br />
Circuits can be designed to provide the specific delay as required. The challenge in<br />
designing delay element circuits is to have circuits that show good signal integrity and low<br />
power consumption. Also the circuits should show very little variation across supply voltage,<br />
temperature and process. An exhaustive study on delay elements has been conducted in the past<br />
to analyze the pros and cons of various delay elements. Some of the conventional delay elements<br />
are the Transmission gate, Cascaded inverter chain, Voltage-Controlled delay elements, and<br />
transmission gate with Schmitt trigger [15][16].<br />
6.1 DELAY ELEMENT TOPOLOGIES<br />
A wide variety of delay element topologies have been described in [15] [16]. Each of the delay<br />
element topology has a unique delay, area, power and signal integrity characteristic.<br />
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