i A PHYSICAL IMPLEMENTATION WITH CUSTOM LOW POWER ...

δt is the regeneration time of the CMOS thyristor and is a minor component of the delay
value but is sensitive to the variation in the supply voltage. Since the major components of the
delay values are insensitive to the supply voltage, the characteristic of this delay element is less
sensitive to the variation in the supply voltage.
As shown in Equation 6-5, with smaller Ictrl, i.e., larger delay value, the delay element
gets less sensitive to the supply voltage variation. Equation 6-5 clearly shows that the delay
value is controlled by the control current Ictrl. The second term in the equation shows the
temperature dependency of the delay with mobility μp.
6.4 MODIFIED CMOS THYRISTOR DELAY ELEMENT
The CMOS thyristor based delay element as suggested by [17] suffers from some drawbacks.
The fundamental drawback arises from charge sharing between the nodes. The assumption that
node Q~ is at Vdd before being discharged by the current source is not valid. This is because the
rising edge of the D input and the signal Penable cause the charge stored on the parasitic
capacitance C0 (shown in Figure 6-18) to be shared with capacitances C1 and C2. The charge
sharing effect causes the voltage at node Q~ to drop from Vdd to Vdd * (C0/(C0+C1+C2)). This
reduction in voltage affects the delay because the node Q~ instead of getting discharged from
Vdd , gets discharged from a lower voltage. Thus the charge sharing phenomenon causes a
decrease in the delay value.
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