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1996 Electronics Industry Environmental Roadmap - Civil and ...

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Oxide<br />

Silicon<br />

1 - Field oxidation<br />

2 - Mask 1: Source/Drain<br />

region definition<br />

<br />

<br />

Implant regions<br />

3 - Implant <strong>and</strong> diffusion<br />

<br />

4 - Mask 2: Define transitor<br />

active regions<br />

<br />

Thin oxide<br />

5 - Thin gate oxidation<br />

<br />

6 - Mask 3: Source/Drain<br />

contact region definition<br />

Conductor<br />

<br />

<br />

<br />

<br />

7 - First level interconnect<br />

conductor deposition<br />

Transistor contacts<br />

<br />

<br />

<br />

<br />

<br />

Insulator<br />

<br />

<br />

<br />

<br />

<br />

Emerging Technologies<br />

8 - Mask 4: First level interconnect<br />

contact conductor pattern<br />

9 - Insulator deposition<br />

<br />

<br />

<br />

<br />

<br />

10 - Insulator planarization<br />

<br />

Etch resist<br />

<br />

<br />

<br />

<br />

<br />

11 - Mask 5: Wiring level<br />

contact definition<br />

<br />

<br />

<br />

<br />

<br />

12 - Contact hole etch <strong>and</strong><br />

etch resist strip<br />

Repeat steps 7-12 to form<br />

multilayer interconnection<br />

Figure 6-1. IC manufacturing process sequence <strong>and</strong> major process steps. Many<br />

of the detailed processes are unique to different manufacturers <strong>and</strong> have been<br />

omitted for generality. Multiple cleaning steps <strong>and</strong> their detailed implementation<br />

have also been left out of the diagram for simplicity.<br />

95

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