1996 Electronics Industry Environmental Roadmap - Civil and ...

Appendix A
SIA/SEMATECH Conversion from 200 mm to larger diameter wafers appears to be
necessary in the late 1990s to achieve the required economies of scale.
Larger diameter wafer fabrication, metrology, and process equipment
costs must all be considered in selection of the next wafer diameter.
The cost of operations for the wafer cleaning performed in IC
fabrication needs to be addressed inasmuch as a final clean is also done
by the wafer supplier. A chemical nature of the wafer surface (i.e.,
hydrophobic vs. hydrophilic) is a critical issue for future technology
notes as well as the implementation of wafer-edge polishing.
Metrology: Developing metrology equipment to ensure productionworthy
counters capable of distinguishing 0.02 µm particles from haze
and surface topological features is essential. Work to standardize
terminology, test procedures, and reference materials for particles,
metals, flatness, and micro-roughness must continue through
international standards committees.
Silicon-on-insulator (SOI) obviates the concern over latch-up while
offering the potential of low power applications, fewer process steps,
faster device speed, and perhaps more importantly, the opportunity of
fabricating a 0.18 µm IC utilizing a 0.25 µm in equipment tool set.
Understanding the relative benefits of SOI technologies (i.e., bonded
wafers, bond and etch-back SOI (BESOI), separation by implantation
of oxygen (SIMOX)) is required in 1995 to determine whether SOI
will become more than a niche technology.
Micron wafers are anticipated by the year 2001, and 400 µm wafers at
the year 2007. Line widths by 2001 are anticipated to be 0.18 µm and
by 2007, 0.10.
Achieving the long-term vision for surface preparation technology
requires a managed transition from wafer cleaning to surface
engineering technologies. Alternatives to solvent-based cleans and the
use of concentrated acid/alkalis need to be developed to minimize
particles, corrosion and contact resistance.
Minimizing surface roughness, particles, and metal contamination will
dictate changing from the traditional RCA clean to dilute chemical
mixtures and alternative chemistries.
The wet chemical cleaning technologies are favored because of many
inherent properties of aqueous solutions, such as the high solubility of
metals, zeta potential control, and the effective sonic energy transmission
for megasonic particle removal. Wet chemical surface preparation
methods are likely to find application for the foreseeable future.
The roadmap discusses near-term potential solutions for forming
shallow junctions: low energy/high current ion beams in conjunction
with heavy ion pre-amorphization and/or molecular species implants.
Also notes selectively CVD deposited poly or epitaxial silica. Other
future processes including plasma doping, gas immersion laser doping
(GILD), and atomic layer epitaxy. The use of CVD or ALE
source/drain heterostructures such as SiGe are for one means of
achieving band gap engineered S/D regions required for device turn-off
at the 0.13 µm and 0.10 µm technology notes.
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