2Gb: x4, x8, x16 DDR3 SDRAM - Micron
2Gb: x4, x8, x16 DDR3 SDRAM - Micron
2Gb: x4, x8, x16 DDR3 SDRAM - Micron
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Table 83: Power-Down Modes<br />
<strong>2Gb</strong>: <strong>x4</strong>, <strong>x8</strong>, <strong>x16</strong> <strong>DDR3</strong> <strong>SDRAM</strong><br />
Power-Down Mode<br />
exit mode precharge power-down. A summary of the two power-down modes is listed in<br />
Table 83 (page 182).<br />
While in either power-down state, CKE is held LOW, RESET# is held HIGH, and a stable<br />
clock signal must be maintained. ODT must be in a valid state but all other input signals<br />
are “Don’t Care.” If RESET# goes LOW during power-down, the DRAM will switch out of<br />
power-down mode and go into the reset state. After CKE is registered LOW, CKE must<br />
remain LOW until tPD (MIN) has been satisfied. The maximum time allowed for powerdown<br />
duration is tPD (MAX) (9 × tREFI). The power-down states are synchronously exited when CKE is registered HIGH (with a<br />
required NOP or DES command). CKE must be maintained HIGH until tCKE has been<br />
satisfied. A valid, executable command may be applied after power-down exit latency,<br />
tXP, and tXPDLL have been satisfied. A summary of the power-down modes is listed below.<br />
For specific CKE-intensive operations, such as repeating a power-down-exit-to-refreshto-power-down-entry<br />
sequence, the number of clock cycles between power-down exit<br />
and power-down entry may not be sufficient to keep the DLL properly updated. In addition<br />
to meeting tPD when the REFRESH command is used between power-down exit<br />
and power-down entry, two other conditions must be met. First, tXP must be satisfied<br />
before issuing the REFRESH command. Second, tXPDLL must be satisfied before the<br />
next power-down may be entered. An example is shown in Figure 105 (page 188).<br />
DRAM State MR0[12] DLL State<br />
Power-<br />
Down Exit Relevant Parameters<br />
Active (any bank open) “Don’t Care” On Fast tXP to any other valid command<br />
Precharged<br />
1 On Fast tXP to any other valid command<br />
(all banks precharged) 0 Off Slow tXPDLL to commands that require the DLL to be<br />
locked (READ, RDAP, or ODT on);<br />
tXP to any other valid command<br />
PDF: 09005aef826aaadc<br />
<strong>2Gb</strong>_<strong>DDR3</strong>_<strong>SDRAM</strong>.pdf – Rev. P 2/12 EN 182 <strong>Micron</strong> Technology, Inc. reserves the right to change products or specifications without notice.<br />
� 2006 <strong>Micron</strong> Technology, Inc. All rights reserved.