2Gb: x4, x8, x16 DDR3 SDRAM - Micron

Table 62: Derating Values for t IS/ t IH – AC135/DC100-Based
CMD/
ADDR
Slew Rate
V/ns
�� tIS, �tIH Derating (ps) – AC/DC-Based
AC135 Threshold: VIH(AC) = VREF(DC) + 135mV, VIL(AC) = VREF(DC) - 135mV
CK, CK# Differential Slew Rate
4.0 V/ns 3.0 V/ns 2.0 V/ns 1.8 V/ns 1.6 V/ns 1.4 V/ns 1.2 V/ns 1.0 V/ns
�tIS �tIH �tIS �tIH �tIS �tIH �tIS �tIH �tIS �tIH �tIH �tIH �tIS �tIH �tIS �tIH 2.0 68 50 68 50 68 50 76 58 84 66 92 74 100 84 108 100
1.5 45 34 45 34 45 34 53 42 61 50 69 58 77 68 85 84
1.0 0 0 0 0 0 0 8 8 16 16 24 24 32 34 40 50
0.9 2 –4 2 –4 2 –4 10 4 18 12 26 20 34 30 42 46
0.8 3 –10 3 –10 3 –10 11 –2 19 6 27 14 35 24 43 40
0.7 6 –16 6 –16 6 –16 14 –8 22 0 30 8 38 18 46 34
0.6 9 –26 9 –26 9 –26 17 –18 25 –10 33 –2 41 8 49 24
0.5 5 –40 5 –40 5 –40 13 –32 21 –24 29 –16 37 –6 45 10
0.4 –3 –60 –3 –60 –3 –60 6 –52 14 –44 22 –36 30 –26 38 –10
Table 63: Derating Values for t IS/ t IH – AC125/DC100-Based
CMD/
ADDR
Slew Rate
V/ns
2Gb: x4, x8, x16 DDR3 SDRAM
Command and Address Setup, Hold, and Derating
�tIS, �tIH Derating (ps) – AC/DC-Based
AC125 Threshold: VIH(AC) = VREF(DC) + 125mV, VIL(AC) = VREF(DC) - 125mV
CK, CK# Differential Slew Rate
4.0 V/ns 3.0 V/ns 2.0 V/ns 1.8 V/ns 1.6 V/ns 1.4 V/ns 1.2 V/ns 1.0 V/ns
�tIS �tIH �tIS �tIH �tIS �tIH �tIS �tIH �tIS �tIH �tIH �tIH �tIS �tIH �tIS �tIH 2.0 63 50 63 50 63 50 71 58 79 66 87 74 95 84 103 100
1.5 42 34 42 34 42 34 50 42 58 50 66 58 74 68 82 84
1.0 0 0 0 0 0 0 8 8 16 16 24 24 32 34 40 50
0.9 4 –4 4 –4 4 –4 12 4 20 12 28 20 36 30 44 46
0.8 6 –10 6 –10 6 –10 14 –2 22 6 30 14 38 24 45 40
0.7 11 –16 11 –16 11 –16 19 –8 27 0 35 8 43 18 51 34
0.6 16 –26 16 –26 16 –26 24 –18 32 –10 40 –2 48 8 56 24
0.5 15 –40 15 –40 15 –40 23 –32 31 –24 39 –16 47 –6 55 10
0.4 13 –60 13 –60 13 –60 21 –52 29 –44 37 –36 45 –26 53 –10
PDF: 09005aef826aaadc
2Gb_DDR3_SDRAM.pdf – Rev. P 2/12 EN 99 Micron Technology, Inc. reserves the right to change products or specifications without notice.
� 2006 Micron Technology, Inc. All rights reserved.