2Gb: x4, x8, x16 DDR3 SDRAM - Micron
2Gb: x4, x8, x16 DDR3 SDRAM - Micron
2Gb: x4, x8, x16 DDR3 SDRAM - Micron
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Table 33: R TT Effective Impedances (Continued)<br />
MR1<br />
[9, 6, 2] RTT Resistor VOUT Min Nom Max Unit<br />
1, 0, 0 ��� RTT20(PD40) 0.2 × VDDQ 0.6 1.0 1.1 RZQ/6<br />
0.5 × VDDQ 0.9 1.0 1.1 RZQ/6<br />
0.8 × VDDQ 0.9 1.0 1.4 RZQ/6<br />
RTT20(PU40) 0.2 × VDDQ 0.9 1.0 1.4 RZQ/6<br />
0.5 × VDDQ 0.9 1.0 1.1 RZQ/6<br />
0.8 × VDDQ 0.6 1.0 1.1 RZQ/6<br />
��� VIL(AC) to VIH(AC) 0.9 1.0 1.6 RZQ/12<br />
ODT Sensitivity<br />
Table 34: ODT Sensitivity Definition<br />
Note: 1. Values assume an RZQ of 240��������<br />
If either the temperature or voltage changes after I/O calibration, then the tolerance<br />
limits listed in Table 32 (page 55) and Table 33 can be expected to widen according to<br />
Table 34 and Table 35 (page 57).<br />
Symbol Min Max Unit<br />
RTT 0.9 - dRTTdT × |DT| - dRTTdV × |DV| 1.6 + dRTTdT × |DT| + dRTTdV × |DV| RZQ/(2, 4, 6, 8, 12)<br />
ODT Timing Definitions<br />
Note: 1. �T = T - T(@ calibration), �V = V DDQ - V DDQ(@ calibration) and V DD = V DDQ.<br />
Table 35: ODT Temperature and Voltage Sensitivity<br />
<strong>2Gb</strong>: <strong>x4</strong>, <strong>x8</strong>, <strong>x16</strong> <strong>DDR3</strong> <strong>SDRAM</strong><br />
ODT Characteristics<br />
Change Min Max Unit<br />
dRTTdT 0 1.5 %/°C<br />
dRTTdV 0 0.15 %/mV<br />
Note: 1. �T = T - T(@ calibration), �V = V DDQ - V DDQ(@ calibration) and V DD = V DDQ.<br />
ODT loading differs from that used in AC timing measurements. The reference load for<br />
ODT timings is shown in Figure 22. Two parameters define when ODT turns on or off<br />
synchronously, two define when ODT turns on or off asynchronously, and another defines<br />
when ODT turns on or off dynamically. Table 36 outlines and provides definition<br />
and measurement references settings for each parameter (see Table 37 (page 58)).<br />
ODT turn-on time begins when the output leaves High-Z and ODT resistance begins to<br />
turn on. ODT turn-off time begins when the output leaves Low-Z and ODT resistance<br />
begins to turn off.<br />
PDF: 09005aef826aaadc<br />
<strong>2Gb</strong>_<strong>DDR3</strong>_<strong>SDRAM</strong>.pdf – Rev. P 2/12 EN 57 <strong>Micron</strong> Technology, Inc. reserves the right to change products or specifications without notice.<br />
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