CMOS Optical Preamplifier Design Using Graphical Circuit Analysis

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1.2 Thesis Outline 6 widths than fiber-optic receivers. This is partly because optical wireless is a low cost application, and partly because the large path losses that are incurred through free- space transmission require the use of large LED’s and photodiodes that are more difficult to drive and interface [Barry,1994]. Such devices typically have active areas on the order of a few square millimeters. Current industry standards support data rates of 4 Mb/s [IrDA,1997], but higher rates of 16Mb/s and above are being inves- tigated. In this thesis, we aim for data rates on the order of 100 Mb/s, a rate that is com- parable with current LAN rates and one that is sufficiently fast to support real-time video applications. 1 In the process of developing our preamplifier circuits, we for- mulate a graphical method of circuit analysis based upon driving-point impedances (DPI) and signal-flow graphs (SFG) that we will refer to as the DPI/SFG analysis method. The following are the main contributions of the thesis: • a variable-gain transimpedance amplifier with improved stability, • an active feedback structure for rejecting ambient light at the preamplifier, • a novel topology for low-voltage transimpedance amplifiers, • the development of dynamic gate biasing (DGB) as a general technique for low-voltage analog circuits, and • a general formulation of the DPI/SFG analysis method and its application to circuit design. Chapter 2 provides the basic background needed for the rest of the thesis. Included is an overview of photodetectors and optical preamplifiers, and a review of previ- ously reported solutions to the new design requirements. The chapter also reviews signal-flow graphs, and the traditional circuit analysis techniques. Included is a discussion of the limitations of each of the techniques, and the motivation behind the DPI/SFG analysis method. Chapter 3 describes the new optical preamplifier structures for enhanced dynamic range, ambient light rejection, and low-voltage operation. We propose a 1. Assuming 8 bits/pixel, 640 x 480 pixels/frame, and 40 frames/sec.
1.2 Thesis Outline 7 technique called dynamic gate biasing (DGB) that uses charge pumps for the stable biasing of transistors. The challenge of analyzing the low-voltage transimpedance amplifier is highlighted to motivate the discussion of graphical circuit analysis in Chapter 4. REFERENCES Chapter 4 presents the DPI/SFG analysis method. The chapter begins with a his- tory of the technique and discusses its current limitations. It then presents a general formulation of the method based on Kirchhoff’s Current Law. Numerous examples are presented to aid the reader with the details of the technique and to highlight its ability to provide insight into a circuit’s operation. Chapter 5 applies the DPI/SFG analysis method to the design and optimization of the low-voltage transimpedance amplifier introduced in Chapter 3. The design process and the ability of DPI/SFG analysis to provide insight into the operation of circuits is emphasized. Chapter 6 presents the implementation details and experimental results of two fabricated integrated circuits that were used to verify the proposed preamplifier designs. Finally, in Chapter 7, the thesis is summarized and directions for future work are discussed. AirFiber Inc., Web Site, http://www.airfiber.com/index.htm. S. B. Alexander, Optical Communication Receiver Design, SPIE Optical Engineering Press, London, UK, Chapter 1, 1997. J. R. Barry, Wireless Infrared Communications, Kluwer Academic Pub., Boston, Mass., Chapter 3, pp. 49-52, 1994. D. L. Begley, editor, Selected Papers on Free-Space Laser Communications II, SPIE Optical Engineering Press, Bellingham, Vol. MS100, 1994. J.P. Bristow and S. Tang, editors, Optoelectronic interconnects VI, Proc. SPIE, vol. 3632, San Jose, CA, January 1999. CableFree Solutions Ltd., Web Site, http://www.cablefree.co.uk. H. D. Chen, “Flip chip bonded hybrid CMOS/SEED optoelectronic smart pixels,” IEE Proc. Opto-
Page 1 and 2: CMOS Optical Preamplifier Design Us
Page 3 and 4: To achieve low-voltage operation, w
Page 5 and 6: Table of Contents CHAPTER 1 INTRODU
Page 7 and 8: CHAPTER 1 1.1 OVERVIEW Introduction
Page 9 and 10: Information Source Modulator Drive
Page 11: 1.2 Thesis Outline 5 [Ohhata,1999].
Page 15 and 16: 1.2 Thesis Outline 9 Detector in St
Page 17 and 18: E e + - V bias 2.1 Photodetectors 1
Page 19 and 20: Diode Capacitance (pF) Diode capaci
Page 21 and 22: 2.2 Optical Preamplifier Structures
Page 23 and 24: 2.3 Transimpedance Amplifier Design
Page 27 and 28: I dc 2.3 Transimpedance Amplifier D
Page 31 and 32: Source Figure 2.11 General structur
Page 33 and 34: A = = For = 1V , the solution is v
Page 35 and 36: The gain of the forward amplifier c
Page 37 and 38: Feedback Analysis Using Return Rati
Page 39 and 40: 2.4 Circuit Analysis Techniques 33
Page 41 and 42: 2.5 An Overview of Signal-Flow Grap
Page 43 and 44: 1 x1 x2 2.5 An Overview of Signal-F
Page 45 and 46: 2.6 SUMMARY REFERENCES • ∆ k =
Page 47 and 48: Symp. Circuits Systems, vol. 3, pp.
Page 49 and 50: CHAPTER 3 New Transimpedance Amplif
Page 51 and 52: 3.1 A Differential Transimpedance A
Page 57 and 58: 3.2 A Feedback Topology for Ambient
Page 59 and 60: 3.2 A Feedback Topology for Ambient
Page 61 and 62: Transimpedance (dBΩ) 90 80 60 40
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3.3 A Low-Voltage Transimpedance Am
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C 3 Φ1VB M 3 V B- =0.7V M 7 Figure
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3.4 SUMMARY 3.4 Summary 71 In this
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3.4 Summary 73 Y. Nakagome et al.,
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4.1 Introduction 75 back topology o
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4.2 Circuit Analysis Using Driving-
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4.3 DPI/SFG: Combining DPI Analysis
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4.4 Determining Port Impedances 87
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v i R in v o R out 4.4 Determining
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id » ro and 1 ⁄ rid « Av ⁄ ro
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Z b r e g m 4.5 Analyzing Transisto
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4.5 Analyzing Transistor Circuits 9
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Figure 4.25 SFG for the source foll
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5.1 Analysis of the Low-Voltage Tra
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5.1 Analysis of the Low-Voltage Tra
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5.2 DEVELOPING AN ANALYTIC CIRCUIT
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Z in 5.2 Developing an Analytic Cir
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5.2 Developing an Analytic Circuit
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I n1 : i in I n2 -I n1 i scin ( sCi
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I nRf : 5.2 Developing an Analytic
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DC transimpedance gain: Pole locati
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Frequency (MHz) 500 450 400 350 300
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Pole frequencies(MHz) 500 450 400 3
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Optimizing Sensitivity 5.2 Developi
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Transimpedance Volts dB (lin) Gain
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CHAPTER 6 Implementation and Experi
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6.1 A 1V Optical Receiver Front-End
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6.1.2 Experimental Results 6.1 A 1V
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Gain(dB) 0 −1 −2 −3 −4 −5
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Clock signal of voltage doubler Eye
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6.2 Variable-Gain Transimpedance Am
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6.2.2 Experimental Results 6.2 Vari
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6.3 Summary and State-of-the-Art Co
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Reference Outputs Technology Supply
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CHAPTER 7 Conclusions 7.1 SUMMARY A
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7.2 Future Work 165 The significanc
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7.2 Future Work 167 supply and subs
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v s i ti that part of the SFG for Q
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Thus, P1 ′ = b = 500Ω ∆1 ′
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itive representation of circuit dyn
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Bipolar Transistor i scb Z b v b b
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CMOS Optical Preamplifier Design Using Graphical Circuit Analysis

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