CMOS Optical Preamplifier Design Using Graphical Circuit Analysis

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Gain (dB) In- 95 80 60 40 20 0 -20 -40 180 90 Phase 0 (degrees) -90 Vb1 Vb2 M3 Ma2 Ma1 M1 M2 3.2 A Feedback Topology for Ambient Light Rejection 54 40 uA 400 uA M4 In+ Understanding the implications of this dependency on is easier when we consider the signal and ambient light sources separately. The most critical situation occurs when the ambient light overpowers the signal. Here is essentially the photocurrent due to the ambient light. From Figure 3.11, we can conclude that the feedback loop is self-regulating in this case, becoming more effective at rejecting M7 M6 Vb3 Mcomp Cc M5 out Figure 3.9 Error amplifier circuit. Figure 3.10 Simulated open-loop gain of error amplifier. M1,2 = 4x10/1 M3,4 = 1x10/1 M5 = 20x10/1 M6 = 20x10/0.8 M7 = 30x10/1.2 Ma1 = 2x10/0.8 Ma2 = 3x10/1.2 Cc = 5pF Mcomp = 10/0.5 -180 10 1kHz 1MHz 1GHz 10GHz frequency I dc I dc
Transimpedance (dBΩ) 90 80 60 40 20 5nA 50nA 500nA 5µA 3.2 A Feedback Topology for Ambient Light Rejection 55 0 100Hz 10kHz 1MHz 100MHz 10 GHz Figure 3.11 Frequency response of preamplifier with dc photocurrent rejection for different current levels. ambient light as the level increases. When the level is low, the feedback loop — or more precisely, transistor M ctl — is nearly off. Since M ctl is located right at the input, any thermal noise it generates adds directly to the signal current. Having Mctl turn off maximizes the preamplifier’s sensitivity in low ambient light. When the signal is much stronger than the ambient light, the saturation of the preamplifier can be prevented by simply adjusting the preamplifier gain. Thus, the ambient photocurrent rejection circuit is not critical here, and can be disabled or limited in order to eliminate this dependency on . In situations involving large dc photocurrents, provisions are required to limit both and the highpass cut-off frequency in order to prevent the preamplifier g mctl I dc increasing I dc frequency from filtering the signal. For instance, from Figure 3.11 we see that at 5µA, the cut- off frequency exceeds 1 MHz, and the outer feedback loop is beginning to affect the passband response of the transimpedance amplifier. Ideally, we would like some method of limiting the current that passes through transistor M ctl . This limit must be greater than the ambient photocurrent generated by the photodiode under the bright- est conditions (e.g. direct sunlight). A potential solution would be to redirect the excess photocurrent into another current source that is static, but which can be switched on when needed. In this way, the new current source does not change the
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CMOS Optical Preamplifier Design Us
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To achieve low-voltage operation, w
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Table of Contents CHAPTER 1 INTRODU
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CHAPTER 1 1.1 OVERVIEW Introduction
Page 9 and 10: Information Source Modulator Drive
Page 11 and 12: 1.2 Thesis Outline 5 [Ohhata,1999].
Page 13 and 14: 1.2 Thesis Outline 7 technique call
Page 15 and 16: 1.2 Thesis Outline 9 Detector in St
Page 17 and 18: E e + - V bias 2.1 Photodetectors 1
Page 19 and 20: Diode Capacitance (pF) Diode capaci
Page 21 and 22: 2.2 Optical Preamplifier Structures
Page 23 and 24: 2.3 Transimpedance Amplifier Design
Page 27 and 28: I dc 2.3 Transimpedance Amplifier D
Page 31 and 32: Source Figure 2.11 General structur
Page 33 and 34: A = = For = 1V , the solution is v
Page 35 and 36: The gain of the forward amplifier c
Page 37 and 38: Feedback Analysis Using Return Rati
Page 39 and 40: 2.4 Circuit Analysis Techniques 33
Page 41 and 42: 2.5 An Overview of Signal-Flow Grap
Page 43 and 44: 1 x1 x2 2.5 An Overview of Signal-F
Page 45 and 46: 2.6 SUMMARY REFERENCES • ∆ k =
Page 47 and 48: Symp. Circuits Systems, vol. 3, pp.
Page 49 and 50: CHAPTER 3 New Transimpedance Amplif
Page 51 and 52: 3.1 A Differential Transimpedance A
Page 57 and 58: 3.2 A Feedback Topology for Ambient
Page 59: 3.2 A Feedback Topology for Ambient
Page 63 and 64: 3.3 A Low-Voltage Transimpedance Am
Page 73 and 74: C 3 Φ1VB M 3 V B- =0.7V M 7 Figure
Page 77 and 78: 3.4 SUMMARY 3.4 Summary 71 In this
Page 79 and 80: 3.4 Summary 73 Y. Nakagome et al.,
Page 81 and 82: 4.1 Introduction 75 back topology o
Page 83 and 84: 4.2 Circuit Analysis Using Driving-
Page 91 and 92: 4.3 DPI/SFG: Combining DPI Analysis
Page 93 and 94: 4.4 Determining Port Impedances 87
Page 95 and 96: v i R in v o R out 4.4 Determining
Page 97 and 98: id » ro and 1 ⁄ rid « Av ⁄ ro
Page 103 and 104: Z b r e g m 4.5 Analyzing Transisto
Page 105 and 106: 4.5 Analyzing Transistor Circuits 9
Page 107 and 108: Figure 4.25 SFG for the source foll
Page 109 and 110: 4.5 Analyzing Transistor Circuits 1
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4.5 Analyzing Transistor Circuits 1
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4.5 Analyzing Transistor Circuits 1
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5.1 Analysis of the Low-Voltage Tra
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5.1 Analysis of the Low-Voltage Tra
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5.2 DEVELOPING AN ANALYTIC CIRCUIT
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Z in 5.2 Developing an Analytic Cir
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5.2 Developing an Analytic Circuit
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I n1 : i in I n2 -I n1 i scin ( sCi
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I nRf : 5.2 Developing an Analytic
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DC transimpedance gain: Pole locati
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Frequency (MHz) 500 450 400 350 300
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Pole frequencies(MHz) 500 450 400 3
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Optimizing Sensitivity 5.2 Developi
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Transimpedance Volts dB (lin) Gain
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CHAPTER 6 Implementation and Experi
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6.1 A 1V Optical Receiver Front-End
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6.1.2 Experimental Results 6.1 A 1V
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Gain(dB) 0 −1 −2 −3 −4 −5
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Clock signal of voltage doubler Eye
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6.2 Variable-Gain Transimpedance Am
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6.2.2 Experimental Results 6.2 Vari
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6.3 Summary and State-of-the-Art Co
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Reference Outputs Technology Supply
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CHAPTER 7 Conclusions 7.1 SUMMARY A
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7.2 Future Work 165 The significanc
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7.2 Future Work 167 supply and subs
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v s i ti that part of the SFG for Q
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Thus, P1 ′ = b = 500Ω ∆1 ′
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itive representation of circuit dyn
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Bipolar Transistor i scb Z b v b b
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CMOS Optical Preamplifier Design Using Graphical Circuit Analysis

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