CMOS Optical Preamplifier Design Using Graphical Circuit Analysis

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5.3 SUMMARY REFERENCES 5.3 Summary 136 In this chapter, we optimized the design of a low-voltage transimpedance amplifier to provide maximum gain and sensitivity for a given bandwidth. In the process, we illustrated the use of DPI/SFG analysis for the synthesis and modelling of circuits. By developing a simplified set of design equations for the preamplifier, we gained insight into the operation of the circuit and its associated design trade-offs. Admittedly, the presentation of the development of an optimized design can seem contrived. Many assumptions and approximations were involved in the development, but the presentation here included only those intuitive guesses that ulti- mately proved correct. In reality, the design process is a complex series of iterative approximations, derivations, and simulations. Designing using DPI/SFG analysis is no different. However, the DPI/SFG method does provide a framework for explora- tion, giving the designer the ability to break down the often complex interactions of signals within a circuit, and to make small, isolated decisions and simplifications which, taken as a whole, produce a better understanding of the design. Incorrect approximations will be made, but with DPI/SFG analysis, a designer can systemati- cally backtrack and evolve his or her decisions until the appropriate trade-offs between model accuracy and simplicity have been achieved. A. A. Abidi, “High-Frequency Noise Measurements on FETs with Small Dimensions,” IEEE Trans. Electron Devices, vol. 33, pp. 1801-1805, November 1986. A. Buchwald and K. Martin, Integrated Fiber-Optic Receivers, Boston: Kluwer Academic Pub., pp. 368-370, 1995. A. Ochoa, 1999. “Translating Noise Signals in Linear Circuits,” Proc. of IEEE Mid-West Symp. Circ. and Syst., Las Cruces, NM, pp. 51-55, August 1999.
CHAPTER 6 Implementation and Experimental Results This chapter discusses the implementation details and presents the experimental results of two integrated circuits (IC) that were implemented to demonstrate the fea- sibility of the proposed optical preamplifier designs. We first present a 1V optical receiver front-end with on-chip dynamic gate biasing, followed by a wide dynamic range variable-gain transimpedance amplifier with ambient light rejection. Both ICs were implemented in a commercial, double-poly, triple-metal, 0.35µm CMOS process. 6.1 A 1V OPTICAL RECEIVER FRONT-END A simplified diagram of the optical receiver front-end is shown in Figure 6.1. The signal path consists of the proposed low-voltage transimpedance preamplifier followed by two post gain stages that reuse the optimized transimpedance design in a transconductance-transimpedance topology. Additional circuitry using a 3V supply was incorporated on-chip only to aid testing. These circuits are represented by the shaded blocks in Figure 6.1. Passive RCfiltering of the charge pump’s output was used to reduce ripple due to charge injection and to isolate the gain stages. 6.1.1 Receiver Building Blocks This section discusses the following additional circuits found on the test chip: • Variable-gain post amplifiers • Limiting amplifier • Digital output driver • Constant-g m bias circuit • Analog multiplexor (MUX) and output buffer • Input test transconductor 137
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CMOS Optical Preamplifier Design Us
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To achieve low-voltage operation, w
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Table of Contents CHAPTER 1 INTRODU
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CHAPTER 1 1.1 OVERVIEW Introduction
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Information Source Modulator Drive
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1.2 Thesis Outline 5 [Ohhata,1999].
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1.2 Thesis Outline 7 technique call
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1.2 Thesis Outline 9 Detector in St
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E e + - V bias 2.1 Photodetectors 1
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Diode Capacitance (pF) Diode capaci
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2.2 Optical Preamplifier Structures
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2.3 Transimpedance Amplifier Design
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I dc 2.3 Transimpedance Amplifier D
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Source Figure 2.11 General structur
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A = = For = 1V , the solution is v
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The gain of the forward amplifier c
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Feedback Analysis Using Return Rati
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2.4 Circuit Analysis Techniques 33
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2.5 An Overview of Signal-Flow Grap
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1 x1 x2 2.5 An Overview of Signal-F
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2.6 SUMMARY REFERENCES • ∆ k =
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Symp. Circuits Systems, vol. 3, pp.
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CHAPTER 3 New Transimpedance Amplif
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3.1 A Differential Transimpedance A
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3.2 A Feedback Topology for Ambient
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3.2 A Feedback Topology for Ambient
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Transimpedance (dBΩ) 90 80 60 40
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3.3 A Low-Voltage Transimpedance Am
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C 3 Φ1VB M 3 V B- =0.7V M 7 Figure
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3.4 SUMMARY 3.4 Summary 71 In this
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3.4 Summary 73 Y. Nakagome et al.,
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4.1 Introduction 75 back topology o
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4.2 Circuit Analysis Using Driving-
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Page 91 and 92: 4.3 DPI/SFG: Combining DPI Analysis
Page 93 and 94: 4.4 Determining Port Impedances 87
Page 95 and 96: v i R in v o R out 4.4 Determining
Page 97 and 98: id » ro and 1 ⁄ rid « Av ⁄ ro
Page 103 and 104: Z b r e g m 4.5 Analyzing Transisto
Page 105 and 106: 4.5 Analyzing Transistor Circuits 9
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Page 119 and 120: 5.2 DEVELOPING AN ANALYTIC CIRCUIT
Page 121 and 122: Z in 5.2 Developing an Analytic Cir
Page 123 and 124: 5.2 Developing an Analytic Circuit
Page 125 and 126: I n1 : i in I n2 -I n1 i scin ( sCi
Page 129 and 130: I nRf : 5.2 Developing an Analytic
Page 131 and 132: DC transimpedance gain: Pole locati
Page 133 and 134: Frequency (MHz) 500 450 400 350 300
Page 135 and 136: Pole frequencies(MHz) 500 450 400 3
Page 137 and 138: Optimizing Sensitivity 5.2 Developi
Page 141: Transimpedance Volts dB (lin) Gain
Page 145 and 146: 6.1 A 1V Optical Receiver Front-End
Page 149 and 150: 6.1.2 Experimental Results 6.1 A 1V
Page 151 and 152: Gain(dB) 0 −1 −2 −3 −4 −5
Page 159 and 160: Clock signal of voltage doubler Eye
Page 161 and 162: 6.2 Variable-Gain Transimpedance Am
Page 163 and 164: 6.2.2 Experimental Results 6.2 Vari
Page 165 and 166: 6.3 Summary and State-of-the-Art Co
Page 167 and 168: Reference Outputs Technology Supply
Page 169 and 170: CHAPTER 7 Conclusions 7.1 SUMMARY A
Page 171 and 172: 7.2 Future Work 165 The significanc
Page 173 and 174: 7.2 Future Work 167 supply and subs
Page 175 and 176: v s i ti that part of the SFG for Q
Page 177 and 178: Thus, P1 ′ = b = 500Ω ∆1 ′
Page 179 and 180: itive representation of circuit dyn
Page 181 and 182: Bipolar Transistor i scb Z b v b b
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CMOS Optical Preamplifier Design Using Graphical Circuit Analysis

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