CMOS Optical Preamplifier Design Using Graphical Circuit Analysis

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4.4 Determining Port Impedances 90 Figure 4.12 Final signal-flow graphs for unity-gain circuit showing all voltage constraints. The final signal-flow graph can be simplified as shown in Figure 4.13 to high- light the relationships needed to find the gain and input and output resistances. The voltage gain can now be easily determined by inspection It is useful to note that, for the voltage gain, vi is considered an independent source. Thus, the graph can be opened at node vi using the substitution theorem, and the feedback path from vo to isci can be disregarded. We can simplify Equation (4.8) by utilizing the fact that 1 ⁄ ro isci rid 1 ⁄ rid iti vi isco ito i ti i sci r id 1 ⁄ rid v x A v Av v i 1 ----- Av + ----- r id r || id ro Figure 4.13 Simplified SFG from Figure 4.12. vo ---vi r id r o i to 1 ⁄ rid r o – – Av ⁄ ro r || id ro 1 ----- A ⎛ v⎞ r || id ro = ⎜ + ----- ⎟ × ------------------------------------------------ ⎝ ⎠ 1 + r || id ro × Av ⁄ ro v o v o (4.8)
id » ro and 1 ⁄ rid « Av ⁄ ro thus giving us the expected approximation of unity, v o ---vi Av 1 ≅ ----- × ---------------- = 1 – ---------------- = ro 1 + Av 1 + Av 4.4 Determining Port Impedances 91 (4.9) For the input resistance, we apply a test current i ti while setting i to to zero. We can use Equation (4.9) to simplify the expression for the input resistance R in ≡ v i --- i ti (4.10) Equation (4.10) is consistent with our knowledge that feedback increases the input resistance by a factor of ( 1 + Av) . For the output resistance, we set the input voltage vi to zero and apply test current ito . With = 0 , the feedback loop from vo to i sci is again disabled, and the resulting resistance is R out ≡ v o ---- i to v i = 0 (4.11) Once again, Equation (4.11) is consistent with our knowledge that feedback decreases the output resistance by a factor of ( 1 + Av) . 4.4.1 Deriving Blackman’s Impedance Formula r o r id In addition to determining the port impedances of general circuit networks, DPI/ SFG analysis is particularly effective for analyzing feedback amplifiers. In this sec- tion, we illustrate how Blackman’s Impedance Formula can be derived using DPI/ SFG analysis. Although other derivations using signal-flow graphs exist [Robichaud,1961], the following derivation uses DPI/SFG analysis to derive the sig- A v ---------------- ≈ 1 1 + Av = ----------------------------------------- ≅ -------------------------------- = rid( 1 + Av) vo 1 A 1 – rid × ---- × ----- ⎛ v ⎞ 1 – ---------------vi r ⎜ ⎟ id ⎝1+ Av⎠ r id v i r || id ro ro = ------------------------------------------------ ≅ ------------------------------------ = ro ⁄ ( 1 + Av) 1 + r || id ro × Av ⁄ ro 1 + ro × Av ⁄ ro
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CMOS Optical Preamplifier Design Us
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To achieve low-voltage operation, w
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Table of Contents CHAPTER 1 INTRODU
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CHAPTER 1 1.1 OVERVIEW Introduction
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Information Source Modulator Drive
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1.2 Thesis Outline 5 [Ohhata,1999].
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1.2 Thesis Outline 7 technique call
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1.2 Thesis Outline 9 Detector in St
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E e + - V bias 2.1 Photodetectors 1
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Diode Capacitance (pF) Diode capaci
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2.2 Optical Preamplifier Structures
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2.3 Transimpedance Amplifier Design
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I dc 2.3 Transimpedance Amplifier D
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Source Figure 2.11 General structur
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A = = For = 1V , the solution is v
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The gain of the forward amplifier c
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Feedback Analysis Using Return Rati
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2.4 Circuit Analysis Techniques 33
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2.5 An Overview of Signal-Flow Grap
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1 x1 x2 2.5 An Overview of Signal-F
Page 45 and 46: 2.6 SUMMARY REFERENCES • ∆ k =
Page 47 and 48: Symp. Circuits Systems, vol. 3, pp.
Page 49 and 50: CHAPTER 3 New Transimpedance Amplif
Page 51 and 52: 3.1 A Differential Transimpedance A
Page 57 and 58: 3.2 A Feedback Topology for Ambient
Page 59 and 60: 3.2 A Feedback Topology for Ambient
Page 61 and 62: Transimpedance (dBΩ) 90 80 60 40
Page 63 and 64: 3.3 A Low-Voltage Transimpedance Am
Page 73 and 74: C 3 Φ1VB M 3 V B- =0.7V M 7 Figure
Page 77 and 78: 3.4 SUMMARY 3.4 Summary 71 In this
Page 79 and 80: 3.4 Summary 73 Y. Nakagome et al.,
Page 81 and 82: 4.1 Introduction 75 back topology o
Page 83 and 84: 4.2 Circuit Analysis Using Driving-
Page 91 and 92: 4.3 DPI/SFG: Combining DPI Analysis
Page 93 and 94: 4.4 Determining Port Impedances 87
Page 95: v i R in v o R out 4.4 Determining
Page 103 and 104: Z b r e g m 4.5 Analyzing Transisto
Page 105 and 106: 4.5 Analyzing Transistor Circuits 9
Page 107 and 108: Figure 4.25 SFG for the source foll
Page 115 and 116: 5.1 Analysis of the Low-Voltage Tra
Page 117 and 118: 5.1 Analysis of the Low-Voltage Tra
Page 119 and 120: 5.2 DEVELOPING AN ANALYTIC CIRCUIT
Page 121 and 122: Z in 5.2 Developing an Analytic Cir
Page 123 and 124: 5.2 Developing an Analytic Circuit
Page 125 and 126: I n1 : i in I n2 -I n1 i scin ( sCi
Page 129 and 130: I nRf : 5.2 Developing an Analytic
Page 131 and 132: DC transimpedance gain: Pole locati
Page 133 and 134: Frequency (MHz) 500 450 400 350 300
Page 135 and 136: Pole frequencies(MHz) 500 450 400 3
Page 137 and 138: Optimizing Sensitivity 5.2 Developi
Page 141 and 142: Transimpedance Volts dB (lin) Gain
Page 143 and 144: CHAPTER 6 Implementation and Experi
Page 145 and 146: 6.1 A 1V Optical Receiver Front-End
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6.1 A 1V Optical Receiver Front-End
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6.1.2 Experimental Results 6.1 A 1V
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Gain(dB) 0 −1 −2 −3 −4 −5
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Clock signal of voltage doubler Eye
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6.2 Variable-Gain Transimpedance Am
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6.2.2 Experimental Results 6.2 Vari
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6.3 Summary and State-of-the-Art Co
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Reference Outputs Technology Supply
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CHAPTER 7 Conclusions 7.1 SUMMARY A
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7.2 Future Work 165 The significanc
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7.2 Future Work 167 supply and subs
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v s i ti that part of the SFG for Q
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Thus, P1 ′ = b = 500Ω ∆1 ′
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itive representation of circuit dyn
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Bipolar Transistor i scb Z b v b b
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CMOS Optical Preamplifier Design Using Graphical Circuit Analysis

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