CMOS Optical Preamplifier Design Using Graphical Circuit Analysis

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APPENDIX B High-Frequency Transistor Models The small-signal transistor models presented in Chapter 4 are sufficient for many applications. In instances where a more accurate representation of the high- frequency performance of a device is required, however, a more complex small-signal model such as the enhanced hybrid-π model shown in Figure B.1 is necessary. This model accounts for the base spreading resistance and the dominant parasitic capacitances of the bipolar transistor. The corresponding SFG is shown in Figure B.2. The high-frequency model for the MOS transistor is shown in Figure B.3, and the corresponding SFG is shown in Figure B.4. These SFGs have been included in the thesis for completeness, and to help highlight the complex interactions which are introduced by the presence of parasitic elements. 174
Bipolar Transistor i scb Z b v b b Z || b r 1 ⁄ r b b r b C be r π b’ + vbe - C cb g m v be e Z e r o c C cs Figure B.1 High-frequency model of a bipolar transistor. i scb ′ 1 ⁄ rb r b || 1 ---------- || 1 r || π ---------- sC be – gm+ sCcb sC cb sC cb gm+ 1 ⁄ rπ + sCbe Figure B.2 SFG for the high-frequency bipolar transistor model shown in Figure B.1. v b ′ 1 ⁄ rπ + sCbe i scc i sce Z c Z || 1 c r || 1 o ---------- || ---------- 1 ⁄ ro – gm sC cs gm + 1 ⁄ ro Z || e r || 1 π r || o ---------- sC be sC cb 175 v c v e
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CMOS Optical Preamplifier Design Us
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To achieve low-voltage operation, w
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Table of Contents CHAPTER 1 INTRODU
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CHAPTER 1 1.1 OVERVIEW Introduction
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Information Source Modulator Drive
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1.2 Thesis Outline 5 [Ohhata,1999].
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1.2 Thesis Outline 7 technique call
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1.2 Thesis Outline 9 Detector in St
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E e + - V bias 2.1 Photodetectors 1
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Diode Capacitance (pF) Diode capaci
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2.2 Optical Preamplifier Structures
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2.3 Transimpedance Amplifier Design
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I dc 2.3 Transimpedance Amplifier D
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Source Figure 2.11 General structur
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A = = For = 1V , the solution is v
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The gain of the forward amplifier c
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Feedback Analysis Using Return Rati
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2.4 Circuit Analysis Techniques 33
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2.5 An Overview of Signal-Flow Grap
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1 x1 x2 2.5 An Overview of Signal-F
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2.6 SUMMARY REFERENCES • ∆ k =
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Symp. Circuits Systems, vol. 3, pp.
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CHAPTER 3 New Transimpedance Amplif
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3.1 A Differential Transimpedance A
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3.2 A Feedback Topology for Ambient
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3.2 A Feedback Topology for Ambient
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Transimpedance (dBΩ) 90 80 60 40
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3.3 A Low-Voltage Transimpedance Am
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C 3 Φ1VB M 3 V B- =0.7V M 7 Figure
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3.4 SUMMARY 3.4 Summary 71 In this
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3.4 Summary 73 Y. Nakagome et al.,
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4.1 Introduction 75 back topology o
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4.2 Circuit Analysis Using Driving-
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4.3 DPI/SFG: Combining DPI Analysis
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4.4 Determining Port Impedances 87
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v i R in v o R out 4.4 Determining
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id » ro and 1 ⁄ rid « Av ⁄ ro
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Z b r e g m 4.5 Analyzing Transisto
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4.5 Analyzing Transistor Circuits 9
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Figure 4.25 SFG for the source foll
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5.1 Analysis of the Low-Voltage Tra
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5.1 Analysis of the Low-Voltage Tra
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5.2 DEVELOPING AN ANALYTIC CIRCUIT
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Z in 5.2 Developing an Analytic Cir
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5.2 Developing an Analytic Circuit
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I n1 : i in I n2 -I n1 i scin ( sCi
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5.2 Developing an Analytic Circuit
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Page 131 and 132: DC transimpedance gain: Pole locati
Page 133 and 134: Frequency (MHz) 500 450 400 350 300
Page 135 and 136: Pole frequencies(MHz) 500 450 400 3
Page 137 and 138: Optimizing Sensitivity 5.2 Developi
Page 139 and 140: 5.2 Developing an Analytic Circuit
Page 141 and 142: Transimpedance Volts dB (lin) Gain
Page 143 and 144: CHAPTER 6 Implementation and Experi
Page 145 and 146: 6.1 A 1V Optical Receiver Front-End
Page 149 and 150: 6.1.2 Experimental Results 6.1 A 1V
Page 151 and 152: Gain(dB) 0 −1 −2 −3 −4 −5
Page 159 and 160: Clock signal of voltage doubler Eye
Page 161 and 162: 6.2 Variable-Gain Transimpedance Am
Page 163 and 164: 6.2.2 Experimental Results 6.2 Vari
Page 165 and 166: 6.3 Summary and State-of-the-Art Co
Page 167 and 168: Reference Outputs Technology Supply
Page 169 and 170: CHAPTER 7 Conclusions 7.1 SUMMARY A
Page 171 and 172: 7.2 Future Work 165 The significanc
Page 173 and 174: 7.2 Future Work 167 supply and subs
Page 175 and 176: v s i ti that part of the SFG for Q
Page 177 and 178: Thus, P1 ′ = b = 500Ω ∆1 ′
Page 179: itive representation of circuit dyn
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CMOS Optical Preamplifier Design Using Graphical Circuit Analysis

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