CMOS Optical Preamplifier Design Using Graphical Circuit Analysis

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v 2 4.2 Circuit Analysis Using Driving-Point Impedances 78 From Equation (4.2), we see that the impedance term is simply the inverse of the sum of the admittances of all passive elements attached to the node. More generally, the term can be interpreted from Figure 4.2 as the impedance seen at node n when all current sources (including dependent sources) and the auxiliary voltage sources at other nodes are set to zero. We define this as the driving-point impedance (DPI) of a node, and represent this impedance by the symbol . The second term of Equation (4.2) represents the superposition of currents flow- ing into node n that are generated by individual current and voltage sources when all other sources including v n are zeroed. Initially, all current and voltage sources are treated as being independent; later, the constraints for all dependent sources are put back in place to re-establish the circuit’s true behaviour. Although, the validity of temporarily treating dependent sources as independent is not clearly stated in some circuit theory textbooks [Davis,2000], the practice is well-established [Mason,1960] and is sometimes referred to as taping [Davis,1998]. Since the second term of Equa- tion (4.2) can be interpreted as the net current that flows into source v n when v n is zeroed and node n is essentially shorted to ground, we define this current as the short-circuit current of a node, and represent it with the symbol . It is important to distinguish this short-circuit current from the actual net current that enters the node, which of course, is always constrained to zero by KCL. v k v 1 .... y n2 y nk y n1 n i nm i n1 .... Figure 4.2 Interpreting Kirchhoff’s Current Law using auxiliary voltage sources. v n Z DP I SC
4.2 Circuit Analysis Using Driving-Point Impedances 79 The representation of a node voltage as a Z DP × I SC product can be used to analyze entire circuits. As a first attempt, the procedure can be expressed in the fol- lowing steps: 1. Attach auxiliary voltage sources, vn , to each node of the linear circuit network. 2. Determine the driving-point impedance and short-circuit current of each node. 3. Finally, the circuit equations are represented by the DPI relations for each node, vn = Z DPn × I SCn (4.3) and by the relations that dictate the values of all sources, both dependent and independent. Ultimately, the concept of placing auxiliary voltage sources is not essential. The idea is simply a convenient paradigm for guiding our analysis and allowing us to apply our traditional understanding of superposition. EXAMPLE 4.1 A SIMPLE LINEAR CIRCUIT We can demonstrate DPI analysis with a simple example. Consider the circuit in Figure 4.3, and determine the node voltages given that = 1Ω , Rb = 5Ω , and I dc = 1A . I x = 2V b V 1 Begin by placing auxiliary voltage sources at nodes 1 and 2. When current source I dc is zeroed, nodes 1 and 2 are isolated. As such, the driving-point impedances are R a R a I 1 dc 2 Figure 4.3 Simple circuit example to demonstrate DPI analysis. V b + - R b V 2
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CMOS Optical Preamplifier Design Us
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To achieve low-voltage operation, w
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Table of Contents CHAPTER 1 INTRODU
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CHAPTER 1 1.1 OVERVIEW Introduction
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Information Source Modulator Drive
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1.2 Thesis Outline 5 [Ohhata,1999].
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1.2 Thesis Outline 7 technique call
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1.2 Thesis Outline 9 Detector in St
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E e + - V bias 2.1 Photodetectors 1
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Diode Capacitance (pF) Diode capaci
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2.2 Optical Preamplifier Structures
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2.3 Transimpedance Amplifier Design
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I dc 2.3 Transimpedance Amplifier D
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Source Figure 2.11 General structur
Page 33 and 34: A = = For = 1V , the solution is v
Page 35 and 36: The gain of the forward amplifier c
Page 37 and 38: Feedback Analysis Using Return Rati
Page 39 and 40: 2.4 Circuit Analysis Techniques 33
Page 41 and 42: 2.5 An Overview of Signal-Flow Grap
Page 43 and 44: 1 x1 x2 2.5 An Overview of Signal-F
Page 45 and 46: 2.6 SUMMARY REFERENCES • ∆ k =
Page 47 and 48: Symp. Circuits Systems, vol. 3, pp.
Page 49 and 50: CHAPTER 3 New Transimpedance Amplif
Page 51 and 52: 3.1 A Differential Transimpedance A
Page 57 and 58: 3.2 A Feedback Topology for Ambient
Page 59 and 60: 3.2 A Feedback Topology for Ambient
Page 61 and 62: Transimpedance (dBΩ) 90 80 60 40
Page 63 and 64: 3.3 A Low-Voltage Transimpedance Am
Page 73 and 74: C 3 Φ1VB M 3 V B- =0.7V M 7 Figure
Page 77 and 78: 3.4 SUMMARY 3.4 Summary 71 In this
Page 79 and 80: 3.4 Summary 73 Y. Nakagome et al.,
Page 81 and 82: 4.1 Introduction 75 back topology o
Page 83: 4.2 Circuit Analysis Using Driving-
Page 87 and 88: 4.2 Circuit Analysis Using Driving-
Page 89 and 90: 4.2 Circuit Analysis Using Driving-
Page 91 and 92: 4.3 DPI/SFG: Combining DPI Analysis
Page 93 and 94: 4.4 Determining Port Impedances 87
Page 95 and 96: v i R in v o R out 4.4 Determining
Page 97 and 98: id » ro and 1 ⁄ rid « Av ⁄ ro
Page 103 and 104: Z b r e g m 4.5 Analyzing Transisto
Page 105 and 106: 4.5 Analyzing Transistor Circuits 9
Page 107 and 108: Figure 4.25 SFG for the source foll
Page 115 and 116: 5.1 Analysis of the Low-Voltage Tra
Page 117 and 118: 5.1 Analysis of the Low-Voltage Tra
Page 119 and 120: 5.2 DEVELOPING AN ANALYTIC CIRCUIT
Page 121 and 122: Z in 5.2 Developing an Analytic Cir
Page 123 and 124: 5.2 Developing an Analytic Circuit
Page 125 and 126: I n1 : i in I n2 -I n1 i scin ( sCi
Page 127 and 128: 5.2 Developing an Analytic Circuit
Page 129 and 130: I nRf : 5.2 Developing an Analytic
Page 131 and 132: DC transimpedance gain: Pole locati
Page 133 and 134: Frequency (MHz) 500 450 400 350 300
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Pole frequencies(MHz) 500 450 400 3
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Optimizing Sensitivity 5.2 Developi
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5.2 Developing an Analytic Circuit
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Transimpedance Volts dB (lin) Gain
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CHAPTER 6 Implementation and Experi
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6.1 A 1V Optical Receiver Front-End
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6.1.2 Experimental Results 6.1 A 1V
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Gain(dB) 0 −1 −2 −3 −4 −5
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Clock signal of voltage doubler Eye
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6.2 Variable-Gain Transimpedance Am
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6.2.2 Experimental Results 6.2 Vari
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6.3 Summary and State-of-the-Art Co
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Reference Outputs Technology Supply
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CHAPTER 7 Conclusions 7.1 SUMMARY A
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7.2 Future Work 165 The significanc
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7.2 Future Work 167 supply and subs
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v s i ti that part of the SFG for Q
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Thus, P1 ′ = b = 500Ω ∆1 ′
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itive representation of circuit dyn
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Bipolar Transistor i scb Z b v b b
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CMOS Optical Preamplifier Design Using Graphical Circuit Analysis

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