CMOS Optical Preamplifier Design Using Graphical Circuit Analysis

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nal-flow graph of a general feedback amplifier. 4.4 Determining Port Impedances 92 To explain Blackman’s Impedance Formula, consider the feedback amplifier model shown in Figure 4.14. Within the amplifier is a controlled source, w, that is related to the controlling quantity x by where k is constant parameter. Although shown as voltages in the figure, the quanti- ties w and x may represent either voltages or currents. As initially presented in Sec- tion 2.4, Blackman’s Impedance Formula states that the impedance at a port of a feedback amplifier is given by where T sc Z port i p w = kx v p ---- Z° 1 T + sc = = ------------------ 1 + T oc (4.12) • is the return ratio with reference to controlled source w when the port is shorted to ground, • T oc is the return-ratio when the port is open-circuited, and • Z° is the open-loop impedance, defined as the measured port impedance when the internal feedback is disabled, either by forcing the controlled source w to zero or equivalently by setting the parameter k to zero. i p v p Feedback Amplifier Controlled source in out x w= kx Figure 4.14 Feedback amplifier model. In DPI/SFG analysis, the port impedance is determined by applying a test current, i p , to the port of interest and measuring the resulting voltage, v p . The SFG for the feedback amplifier is shown in Figure 4.15. The graph is complete in that all possible interactions between the port and the controlled source have been repre
4.4 Determining Port Impedances 93 sented by the various transmittance branches. For instance, transmittance rep- resents the overall transfer function from the controlled source w to the short-circuit current node of the port. In practice, these transmittance branches are determined through collapsing appropriate portions of the signal-flow graphs of actual circuits. i p i SCp Y pp Z DPp Figure 4.15 General SFG of feedback amplifier in Figure 4.14. To relate the SFG in Figure 4.15 to Blackman’s Impedance Formula, we need to re-represent the graph in terms of the open-loop impedance, Z° . When the feedback is disabled, we obtain the graph shown in Figure 4.16a. The graph can be simplified down to Figure 4.16c where Z° is given by i p i SCp a) Y pp Z DPp vp Txp T px Z o i p v p T xp T wp T px The feedback amplifier can now be represented by the alternative SFG shown in Figure 4.17. <strong>Using</strong> Mason’s Direct Rule to find the port impedance, v p ⁄ i p, we see x Z DPp T wx k w = --------------------------------------------------------------- . 1 – Z DPp( Y pp + T pxT xp) x i SCp Z o c) i SCp Z DPp T wp Figure 4.16 Collapsing the SFG of the feedback amplifier with feedback disabled. v p i p T px x Y pp +T px T xp b) v p T px x
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CMOS Optical Preamplifier Design Us
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To achieve low-voltage operation, w
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Table of Contents CHAPTER 1 INTRODU
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CHAPTER 1 1.1 OVERVIEW Introduction
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Information Source Modulator Drive
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1.2 Thesis Outline 5 [Ohhata,1999].
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1.2 Thesis Outline 7 technique call
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1.2 Thesis Outline 9 Detector in St
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E e + - V bias 2.1 Photodetectors 1
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Diode Capacitance (pF) Diode capaci
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2.2 Optical Preamplifier Structures
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2.3 Transimpedance Amplifier Design
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I dc 2.3 Transimpedance Amplifier D
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Source Figure 2.11 General structur
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A = = For = 1V , the solution is v
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The gain of the forward amplifier c
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Feedback Analysis Using Return Rati
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2.4 Circuit Analysis Techniques 33
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2.5 An Overview of Signal-Flow Grap
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1 x1 x2 2.5 An Overview of Signal-F
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2.6 SUMMARY REFERENCES • ∆ k =
Page 47 and 48: Symp. Circuits Systems, vol. 3, pp.
Page 49 and 50: CHAPTER 3 New Transimpedance Amplif
Page 51 and 52: 3.1 A Differential Transimpedance A
Page 57 and 58: 3.2 A Feedback Topology for Ambient
Page 59 and 60: 3.2 A Feedback Topology for Ambient
Page 61 and 62: Transimpedance (dBΩ) 90 80 60 40
Page 63 and 64: 3.3 A Low-Voltage Transimpedance Am
Page 73 and 74: C 3 Φ1VB M 3 V B- =0.7V M 7 Figure
Page 77 and 78: 3.4 SUMMARY 3.4 Summary 71 In this
Page 79 and 80: 3.4 Summary 73 Y. Nakagome et al.,
Page 81 and 82: 4.1 Introduction 75 back topology o
Page 83 and 84: 4.2 Circuit Analysis Using Driving-
Page 91 and 92: 4.3 DPI/SFG: Combining DPI Analysis
Page 93 and 94: 4.4 Determining Port Impedances 87
Page 95 and 96: v i R in v o R out 4.4 Determining
Page 97: id » ro and 1 ⁄ rid « Av ⁄ ro
Page 101 and 102: 4.4 Determining Port Impedances 95
Page 103 and 104: Z b r e g m 4.5 Analyzing Transisto
Page 105 and 106: 4.5 Analyzing Transistor Circuits 9
Page 107 and 108: Figure 4.25 SFG for the source foll
Page 115 and 116: 5.1 Analysis of the Low-Voltage Tra
Page 117 and 118: 5.1 Analysis of the Low-Voltage Tra
Page 119 and 120: 5.2 DEVELOPING AN ANALYTIC CIRCUIT
Page 121 and 122: Z in 5.2 Developing an Analytic Cir
Page 123 and 124: 5.2 Developing an Analytic Circuit
Page 125 and 126: I n1 : i in I n2 -I n1 i scin ( sCi
Page 129 and 130: I nRf : 5.2 Developing an Analytic
Page 131 and 132: DC transimpedance gain: Pole locati
Page 133 and 134: Frequency (MHz) 500 450 400 350 300
Page 135 and 136: Pole frequencies(MHz) 500 450 400 3
Page 137 and 138: Optimizing Sensitivity 5.2 Developi
Page 141 and 142: Transimpedance Volts dB (lin) Gain
Page 143 and 144: CHAPTER 6 Implementation and Experi
Page 145 and 146: 6.1 A 1V Optical Receiver Front-End
Page 147 and 148: 6.1 A 1V Optical Receiver Front-End
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6.1.2 Experimental Results 6.1 A 1V
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Gain(dB) 0 −1 −2 −3 −4 −5
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6.1 A 1V Optical Receiver Front-End
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Clock signal of voltage doubler Eye
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6.2 Variable-Gain Transimpedance Am
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6.2.2 Experimental Results 6.2 Vari
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6.3 Summary and State-of-the-Art Co
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Reference Outputs Technology Supply
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CHAPTER 7 Conclusions 7.1 SUMMARY A
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7.2 Future Work 165 The significanc
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7.2 Future Work 167 supply and subs
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v s i ti that part of the SFG for Q
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Thus, P1 ′ = b = 500Ω ∆1 ′
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itive representation of circuit dyn
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Bipolar Transistor i scb Z b v b b
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CMOS Optical Preamplifier Design Using Graphical Circuit Analysis

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