CMOS Optical Preamplifier Design Using Graphical Circuit Analysis

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3.3 A Low-Voltage Transimpedance Amplifier 58 the feedback resistor be attached across the input and output ports of the current mirror as found in other so-called ‘current-mode’ designs [Vanisri, 1992 and 1995]. Unfortunately, such a configuration would set the output bias voltage to that of the input terminal, or , and the resulting circuit would have essentially no output swing. To overcome this problem, the left terminal of the feedback resistor is instead attached to node A in Figure 3.13. The ability to vary the gain of a transimpedance amplifier is especially crucial in enhancing the dynamic range of low-voltage circuits where the signal swings are severely limited. In addition, a constant bandwidth is desirable for variable-gain transimpedance amplifiers because it helps eliminate out-of-band noise, thereby enhancing sensitivity in even the lowest gain settings. Ideally, the topology shown in Figure 3.14 achieves this desired gain-bandwidth independence by virtue of its use of a current amplifier [Wilson,1997]. Recall that the feedback signal in a transimpedance amplifier is a current. When the gain stage is a current amplifier, the feedback signal is simply the output current of the amplifier and is independent of the value of which determines the overall transimpedance gain. In contrast, when the gain stage is a voltage amplifier, the feedback resistor is used to convert the output voltage back into the feedback current. The smaller the resistance, the larger the feedback current. Increasing the feedback signal in turn increases the closed-loop bandwidth of the transimpedance amplifier. As discussed in Section 3.1, gain-bandwidth independence can be achieved by having the open- loop gain track the transimpedance gain, as represented by the tracking of resistors R 1 and in the two designs shown in Figure 3.1. Thus, through different mecha- R f V DSsat2 nisms, both the proposed transimpedance amplifiers represented by Figure 3.1a and Figure 3.12 achieve gain-bandwidth independence. R f Returning to the proposed preamplifier circuit in Figure 3.12, we can see that the input voltage can be set to which is about 200mV. The resulting photo- V DSsat2 diode bias voltage is ( – ) which, for a 1V supply, is about 0.8V or V DD V DSsat2
3.3 A Low-Voltage Transimpedance Amplifier 59 80% of the supply. This amplifier possesses a large output swing because data pulses from the photodiode are injected into the preamplifier, resulting in negative- going output pulses. Since the output is biased at V GS3 = V tn + V DSsat3 and can swing down to , the amplifier has an output swing equal to the threshold voltage, . For a 0.6V threshold voltage, an output swing of 0.6V represents 60% of a 1V supply. Thus, in contrast to the designs presented in Chapter 2, the proposed structure achieves both a large bias voltage and large signal swing. It should be noted that the bias voltage is maximized because of the use of a common-gate input stage. Thus, the possibility exists for other common-gate topologies [Vanisri, 1992 and 1995] to provide a large bias voltage while having otherwise distinct characteristics. Figure 3.14 Transimpedance amplifier utilizing a current gain stage. Having proposed a novel low-voltage circuit topology, the next step is to ana- lyze the circuit and to optimize the design. The basic dc characteristics of transimpedance gain and input and output resistance can be derived from a few observations based on the simplified dc small-signal circuit shown in Figure 3.15. The first observation is that the input current is divided amongst the drain currents of and , so that M 2 V tn M 3 or equivalently that V DSsat3 Secondly, the output voltage is given in terms of by i in 1:A i R f iin = gm2v A + gm3v A vA = iin ⁄ ( gm2 + gm3) v A vout = vA – R f gm3v A v out (3.10) (3.11) . (3.12)
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CMOS Optical Preamplifier Design Us
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To achieve low-voltage operation, w
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Table of Contents CHAPTER 1 INTRODU
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CHAPTER 1 1.1 OVERVIEW Introduction
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Information Source Modulator Drive
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1.2 Thesis Outline 5 [Ohhata,1999].
Page 13 and 14: 1.2 Thesis Outline 7 technique call
Page 15 and 16: 1.2 Thesis Outline 9 Detector in St
Page 17 and 18: E e + - V bias 2.1 Photodetectors 1
Page 19 and 20: Diode Capacitance (pF) Diode capaci
Page 21 and 22: 2.2 Optical Preamplifier Structures
Page 23 and 24: 2.3 Transimpedance Amplifier Design
Page 27 and 28: I dc 2.3 Transimpedance Amplifier D
Page 31 and 32: Source Figure 2.11 General structur
Page 33 and 34: A = = For = 1V , the solution is v
Page 35 and 36: The gain of the forward amplifier c
Page 37 and 38: Feedback Analysis Using Return Rati
Page 39 and 40: 2.4 Circuit Analysis Techniques 33
Page 41 and 42: 2.5 An Overview of Signal-Flow Grap
Page 43 and 44: 1 x1 x2 2.5 An Overview of Signal-F
Page 45 and 46: 2.6 SUMMARY REFERENCES • ∆ k =
Page 47 and 48: Symp. Circuits Systems, vol. 3, pp.
Page 49 and 50: CHAPTER 3 New Transimpedance Amplif
Page 51 and 52: 3.1 A Differential Transimpedance A
Page 57 and 58: 3.2 A Feedback Topology for Ambient
Page 59 and 60: 3.2 A Feedback Topology for Ambient
Page 61 and 62: Transimpedance (dBΩ) 90 80 60 40
Page 63: 3.3 A Low-Voltage Transimpedance Am
Page 67 and 68: 3.3 A Low-Voltage Transimpedance Am
Page 73 and 74: C 3 Φ1VB M 3 V B- =0.7V M 7 Figure
Page 77 and 78: 3.4 SUMMARY 3.4 Summary 71 In this
Page 79 and 80: 3.4 Summary 73 Y. Nakagome et al.,
Page 81 and 82: 4.1 Introduction 75 back topology o
Page 83 and 84: 4.2 Circuit Analysis Using Driving-
Page 91 and 92: 4.3 DPI/SFG: Combining DPI Analysis
Page 93 and 94: 4.4 Determining Port Impedances 87
Page 95 and 96: v i R in v o R out 4.4 Determining
Page 97 and 98: id » ro and 1 ⁄ rid « Av ⁄ ro
Page 103 and 104: Z b r e g m 4.5 Analyzing Transisto
Page 105 and 106: 4.5 Analyzing Transistor Circuits 9
Page 107 and 108: Figure 4.25 SFG for the source foll
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5.1 Analysis of the Low-Voltage Tra
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5.1 Analysis of the Low-Voltage Tra
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5.2 DEVELOPING AN ANALYTIC CIRCUIT
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Z in 5.2 Developing an Analytic Cir
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5.2 Developing an Analytic Circuit
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I n1 : i in I n2 -I n1 i scin ( sCi
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I nRf : 5.2 Developing an Analytic
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DC transimpedance gain: Pole locati
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Frequency (MHz) 500 450 400 350 300
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Pole frequencies(MHz) 500 450 400 3
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Optimizing Sensitivity 5.2 Developi
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Transimpedance Volts dB (lin) Gain
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CHAPTER 6 Implementation and Experi
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6.1 A 1V Optical Receiver Front-End
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6.1.2 Experimental Results 6.1 A 1V
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Gain(dB) 0 −1 −2 −3 −4 −5
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Clock signal of voltage doubler Eye
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6.2 Variable-Gain Transimpedance Am
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6.2.2 Experimental Results 6.2 Vari
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6.3 Summary and State-of-the-Art Co
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Reference Outputs Technology Supply
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CHAPTER 7 Conclusions 7.1 SUMMARY A
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7.2 Future Work 165 The significanc
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7.2 Future Work 167 supply and subs
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v s i ti that part of the SFG for Q
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Thus, P1 ′ = b = 500Ω ∆1 ′
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itive representation of circuit dyn
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Bipolar Transistor i scb Z b v b b
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CMOS Optical Preamplifier Design Using Graphical Circuit Analysis

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