CMOS Optical Preamplifier Design Using Graphical Circuit Analysis

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4.1 Introduction 76 onstrated the effectiveness of representing such systems using signal-flow graphs. Ochoa has since applied the DPI/SFG method to noise and stability analysis [Ochoa,1997, 1999a]. Thus far, DPI/SFG analysis has been explained principally through specific circuit examples, making it difficult to generalize the method for arbitrary circuit networks. For example, none of the reported examples involve floating voltage sources. In this thesis, we develop a general formulation of the method suitable for all linear networks, first by justifying driving-point impedance analysis as a cause-and-effect interpretation of Kirchhoff’s Current Law, and then by applying signal-flow graph theory. Throughout this chapter, we illustrate the method on a range of circuits involving transistors and ideal building blocks. Our two particular contributions are in showing how circuits with floating voltage sources are handled, and in re-deriv- ing Blackman’s Impedance Formula using DPI/SFG analysis. The final contribution of this chapter is in the area of education. Our motivation for pursuing the development and refinement of the DPI/SFG method is deeply rooted in the belief that we can improve the way in which we analyze and teach feedback circuits. This chapter is intended to give the reader a thorough understand- ing of the DPI/SFG method. Throughout the chapter, original circuit examples are presented to illustrate how DPI/SFG analysis is applied to a wide variety of circuits. These examples are meant to help the reader with the mechanics of the method as well as to highlight some of the strengths of DPI/SFG analysis in providing insight into the operation of circuits.
4.2 Circuit Analysis Using Driving-Point Impedances 77 4.2 CIRCUIT ANALYSIS USING DRIVING-POINT IMPEDANCES Consider an internal node within an arbitrary circuit network comprised of pas- sive elements and current sources as illustrated in Figure 4.1. v 2 y n2 From Kirchhoff’s Current Law (KCL), we can express the net current into node n as (4.1) This can be rewritten in a cause-and-effect form in which the effect — node voltage v n — is presented as the result of the various causes — all admittances, current sources, and the other node voltages: v n (4.2) Equation (4.2) is in the form of Ohm’s Law, and indicates that the voltage at a node can be expressed as the product of an impedance and a current. We can reinterpret this form of KCL for linear networks in terms of auxiliary voltage sources as shown in Figure 4.2. For the moment, we can imagine that each of the node voltages are now determined by an independent voltage source. v 1 .... v k y n1 y nk n i nm i n1 .... Figure 4.1 General circuit node. k ∑ j = 1 k ∑ ynj j = 1 ( v j – vn)ynj – 1 k ∑ m ∑ inj j = 1 + = 0 = v j ynj + inj = Z DP × I SC ⎧ ⎪ ⎨ ⎪ ⎩ Driving-point impedance j = 1 ⎧ ⎪ ⎪ ⎪ ⎨ m ∑ j = 1 ⎪ ⎪ ⎪ ⎩ Short-circuit current
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CMOS Optical Preamplifier Design Us
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To achieve low-voltage operation, w
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Table of Contents CHAPTER 1 INTRODU
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CHAPTER 1 1.1 OVERVIEW Introduction
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Information Source Modulator Drive
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1.2 Thesis Outline 5 [Ohhata,1999].
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1.2 Thesis Outline 7 technique call
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1.2 Thesis Outline 9 Detector in St
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E e + - V bias 2.1 Photodetectors 1
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Diode Capacitance (pF) Diode capaci
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2.2 Optical Preamplifier Structures
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2.3 Transimpedance Amplifier Design
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I dc 2.3 Transimpedance Amplifier D
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Page 31 and 32: Source Figure 2.11 General structur
Page 33 and 34: A = = For = 1V , the solution is v
Page 35 and 36: The gain of the forward amplifier c
Page 37 and 38: Feedback Analysis Using Return Rati
Page 39 and 40: 2.4 Circuit Analysis Techniques 33
Page 41 and 42: 2.5 An Overview of Signal-Flow Grap
Page 43 and 44: 1 x1 x2 2.5 An Overview of Signal-F
Page 45 and 46: 2.6 SUMMARY REFERENCES • ∆ k =
Page 47 and 48: Symp. Circuits Systems, vol. 3, pp.
Page 49 and 50: CHAPTER 3 New Transimpedance Amplif
Page 51 and 52: 3.1 A Differential Transimpedance A
Page 57 and 58: 3.2 A Feedback Topology for Ambient
Page 59 and 60: 3.2 A Feedback Topology for Ambient
Page 61 and 62: Transimpedance (dBΩ) 90 80 60 40
Page 63 and 64: 3.3 A Low-Voltage Transimpedance Am
Page 73 and 74: C 3 Φ1VB M 3 V B- =0.7V M 7 Figure
Page 77 and 78: 3.4 SUMMARY 3.4 Summary 71 In this
Page 79 and 80: 3.4 Summary 73 Y. Nakagome et al.,
Page 81: 4.1 Introduction 75 back topology o
Page 85 and 86: 4.2 Circuit Analysis Using Driving-
Page 91 and 92: 4.3 DPI/SFG: Combining DPI Analysis
Page 93 and 94: 4.4 Determining Port Impedances 87
Page 95 and 96: v i R in v o R out 4.4 Determining
Page 97 and 98: id » ro and 1 ⁄ rid « Av ⁄ ro
Page 103 and 104: Z b r e g m 4.5 Analyzing Transisto
Page 105 and 106: 4.5 Analyzing Transistor Circuits 9
Page 107 and 108: Figure 4.25 SFG for the source foll
Page 115 and 116: 5.1 Analysis of the Low-Voltage Tra
Page 117 and 118: 5.1 Analysis of the Low-Voltage Tra
Page 119 and 120: 5.2 DEVELOPING AN ANALYTIC CIRCUIT
Page 121 and 122: Z in 5.2 Developing an Analytic Cir
Page 123 and 124: 5.2 Developing an Analytic Circuit
Page 125 and 126: I n1 : i in I n2 -I n1 i scin ( sCi
Page 127 and 128: 5.2 Developing an Analytic Circuit
Page 129 and 130: I nRf : 5.2 Developing an Analytic
Page 131 and 132: DC transimpedance gain: Pole locati
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Frequency (MHz) 500 450 400 350 300
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Pole frequencies(MHz) 500 450 400 3
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Optimizing Sensitivity 5.2 Developi
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5.2 Developing an Analytic Circuit
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Transimpedance Volts dB (lin) Gain
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CHAPTER 6 Implementation and Experi
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6.1 A 1V Optical Receiver Front-End
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6.1.2 Experimental Results 6.1 A 1V
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Gain(dB) 0 −1 −2 −3 −4 −5
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Clock signal of voltage doubler Eye
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6.2 Variable-Gain Transimpedance Am
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6.2.2 Experimental Results 6.2 Vari
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6.3 Summary and State-of-the-Art Co
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Reference Outputs Technology Supply
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CHAPTER 7 Conclusions 7.1 SUMMARY A
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7.2 Future Work 165 The significanc
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7.2 Future Work 167 supply and subs
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v s i ti that part of the SFG for Q
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Thus, P1 ′ = b = 500Ω ∆1 ′
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itive representation of circuit dyn
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Bipolar Transistor i scb Z b v b b
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CMOS Optical Preamplifier Design Using Graphical Circuit Analysis

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