CMOS Optical Preamplifier Design Using Graphical Circuit Analysis

Final Design
Average input−referred Noise Current (pA/Hz 1/2 ) dB
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0 5
R (kΩ)
f
10 15
5.2 Developing an Analytic Circuit Model 132
We have completed our characterization of the preamplifier’s bandwidth and
sensitivity and are ready to finalize the design. To summarize, we have found the
optimum feedback resistance to be in the range of 4 ∼ 5kΩand
the optimum cur-
rent mirror gain to be in the range of 12 ∼ 16dB . A current-mirror gain of 12dB is
desirable from a practical standpoint because the resulting 4:1 ratio between the
sizes of transistors and allows for a common-centroid layout of the transis-
tors which helps minimize offsets caused by device mismatch.
To determine the sizing of the transistors, we first considered our 1V system
supply constraint. In order to operate down to 1V, we biased all transistors on the
lower boundary of deep inversion with a saturation voltage of about 200mV. We
verified our earlier observation that consuming greater power dissipation does not
improve performance and so determined the bias currents based on the requirements
of the photodiode. Given a nominal and maximum photocurrent signal of 1 µA and
40µA respectively, we set the bias current at the input stage of the preamplifier to
64 µA
, large enough to ensure that the photodiode reverse bias voltage does not
change significantly over the signal range.
Average input−referred Noise Current (pA/Hz 1/2 ) dB
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0 −10
20*log (K )
10 cm
Figure 5.23 The dc input-referred noise current vs. R f and K cm in dB.
M 3
M 2
−20