CMOS Optical Preamplifier Design Using Graphical Circuit Analysis

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3.3 A Low-Voltage Transimpedance Amplifier 56 loop dynamics, but simply off-loads some of the current transistor Mctl would oth- erwise need to draw. Fluorescent lamps with electronic ballasts require special consideration. These lamps do not have strong emissions in the infrared spectrum, so saturation of the preamplifier is usually not a problem. However, the rapid firing of the ballasts pro- duces interference patterns with harmonics that can reach 1 MHz [Moreira,1997]. Consequently, additional high-pass filtering may be needed further along in the receiver to reject this interference. 3.3 A LOW-VOLTAGE TRANSIMPEDANCE AMPLIFIER As mentioned in Chapter 2, one of the primary challenges of designing optical preamplifiers capable of low-voltage operation is maximizing both the output signal swing and the bias voltage for the photodiode. Towards this end, we developed the novel transimpedance structure shown in Figure 3.12. This circuit merges two sepa- rate ideas: a sub 1-V current mirror [Rijns,1993], [Peluso,1997] and a transimpedance amplifier based around a current-gain amplifier [Wilson,1997]. V DD =1V + ~0.8V - i in I B1 M 1 V DD ~0.2V V bias ~0.8V V DGB M 2 M 3 Figure 3.12 A low-voltage transimpedance amplifier. The sub 1-V current mirror is shown in Figure 3.13. The current mirror differs from a normal mirror circuit with the additional device M 1 at the input. Since the R f V DD I B2 vout ~0.8V
3.3 A Low-Voltage Transimpedance Amplifier 57 impedance looking into the source of M 1 is much lower than the impedance looking into the drain of M 2 , the input current will be redirected up through M 1 and into node A. The injected charge will adjust the gate voltage of M 2 such that at steady state, the input current is redirected down through M 2 . Since M 3 has the same gate- to-source voltage as M 2 , the input current is duplicated at the output. However, unlike a normal mirror whose input is biased at , the input voltage here is ( V bias – V GS1) which is adjustable and can be reduced to V DSsat2 , the saturation voltage of M2 , before device M2 drops out of the active mode of operation. A transimpedance amplifier based around a current-gain amplifier is shown in Figure 3.14. The amplifier uses the traditional transimpedance structure of a gain stage shunted by a feedback resistor, but the traditional voltage amplifier is replaced by a current amplifier. The schematic convention used here is adopted from [Johns,1997] 2 . Here, the arrow marks the input and the direction of current flow, and A i is the open-loop current gain. It can be shown that the transimpedance gain of this structure is R in where is the amplifier’s input resistance which is typically low. A direct implementation of Figure 3.14 using the current mirror in Figure 3.13 would require that 2. Chapter 6, p. 266. i in A M 1 M 2 I B v bias V DD V GS2 M 3 Figure 3.13 Sub 1-V current mirror. v out -------- i in R f Ai – Rin = – --------------------------- ≈ – R f 1 + Ai I B i out = i in
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CMOS Optical Preamplifier Design Us
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To achieve low-voltage operation, w
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Table of Contents CHAPTER 1 INTRODU
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CHAPTER 1 1.1 OVERVIEW Introduction
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Information Source Modulator Drive
Page 11 and 12: 1.2 Thesis Outline 5 [Ohhata,1999].
Page 13 and 14: 1.2 Thesis Outline 7 technique call
Page 15 and 16: 1.2 Thesis Outline 9 Detector in St
Page 17 and 18: E e + - V bias 2.1 Photodetectors 1
Page 19 and 20: Diode Capacitance (pF) Diode capaci
Page 21 and 22: 2.2 Optical Preamplifier Structures
Page 23 and 24: 2.3 Transimpedance Amplifier Design
Page 27 and 28: I dc 2.3 Transimpedance Amplifier D
Page 31 and 32: Source Figure 2.11 General structur
Page 33 and 34: A = = For = 1V , the solution is v
Page 35 and 36: The gain of the forward amplifier c
Page 37 and 38: Feedback Analysis Using Return Rati
Page 39 and 40: 2.4 Circuit Analysis Techniques 33
Page 41 and 42: 2.5 An Overview of Signal-Flow Grap
Page 43 and 44: 1 x1 x2 2.5 An Overview of Signal-F
Page 45 and 46: 2.6 SUMMARY REFERENCES • ∆ k =
Page 47 and 48: Symp. Circuits Systems, vol. 3, pp.
Page 49 and 50: CHAPTER 3 New Transimpedance Amplif
Page 51 and 52: 3.1 A Differential Transimpedance A
Page 57 and 58: 3.2 A Feedback Topology for Ambient
Page 59 and 60: 3.2 A Feedback Topology for Ambient
Page 61: Transimpedance (dBΩ) 90 80 60 40
Page 65 and 66: 3.3 A Low-Voltage Transimpedance Am
Page 73 and 74: C 3 Φ1VB M 3 V B- =0.7V M 7 Figure
Page 77 and 78: 3.4 SUMMARY 3.4 Summary 71 In this
Page 79 and 80: 3.4 Summary 73 Y. Nakagome et al.,
Page 81 and 82: 4.1 Introduction 75 back topology o
Page 83 and 84: 4.2 Circuit Analysis Using Driving-
Page 91 and 92: 4.3 DPI/SFG: Combining DPI Analysis
Page 93 and 94: 4.4 Determining Port Impedances 87
Page 95 and 96: v i R in v o R out 4.4 Determining
Page 97 and 98: id » ro and 1 ⁄ rid « Av ⁄ ro
Page 103 and 104: Z b r e g m 4.5 Analyzing Transisto
Page 105 and 106: 4.5 Analyzing Transistor Circuits 9
Page 107 and 108: Figure 4.25 SFG for the source foll
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4.5 Analyzing Transistor Circuits 1
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5.1 Analysis of the Low-Voltage Tra
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5.1 Analysis of the Low-Voltage Tra
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5.2 DEVELOPING AN ANALYTIC CIRCUIT
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Z in 5.2 Developing an Analytic Cir
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5.2 Developing an Analytic Circuit
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I n1 : i in I n2 -I n1 i scin ( sCi
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I nRf : 5.2 Developing an Analytic
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DC transimpedance gain: Pole locati
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Frequency (MHz) 500 450 400 350 300
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Pole frequencies(MHz) 500 450 400 3
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Optimizing Sensitivity 5.2 Developi
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Transimpedance Volts dB (lin) Gain
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CHAPTER 6 Implementation and Experi
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6.1 A 1V Optical Receiver Front-End
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6.1.2 Experimental Results 6.1 A 1V
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Gain(dB) 0 −1 −2 −3 −4 −5
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Clock signal of voltage doubler Eye
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6.2 Variable-Gain Transimpedance Am
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6.2.2 Experimental Results 6.2 Vari
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6.3 Summary and State-of-the-Art Co
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Reference Outputs Technology Supply
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CHAPTER 7 Conclusions 7.1 SUMMARY A
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7.2 Future Work 165 The significanc
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7.2 Future Work 167 supply and subs
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v s i ti that part of the SFG for Q
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Thus, P1 ′ = b = 500Ω ∆1 ′
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itive representation of circuit dyn
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Bipolar Transistor i scb Z b v b b
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