CMOS Optical Preamplifier Design Using Graphical Circuit Analysis

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a) – ( + ) i scin b) g m1 Z in g s1 1 ∼ 1 ⁄ ( gm1 + gs1) c) d) v in v in gm1 + gs1 – gm2 1 gm1 + gs1 ∼ – gm2 Z || A Z f vA ∼ R f vA R || f 1 ⁄ gm2 v A ∼ ∼ 5.2 Developing an Analytic <strong>Circuit</strong> Model 122 Y f – gm3 + Y f Y f I n3 + I n3b – gm3 + Y f – 1 R f g m3 I n3 + I n3b I n3 + I n3b + – 1 R f I n3 + I n3b i scout i scout i scout i scout Z || f Z l Z || f Z l R || out 1 ⁄ sCL R out v out ∼ R || f 1 ⁄ sCL v out v out v out 1 ⁄ gm2 + R f = ------------------------------ 1 + K cm Figure 5.13 Progressive approximation and collapsing of SFG in order to determine output impedance.
I nRf : 5.2 Developing an Analytic <strong>Circuit</strong> Model 123 Following the convention used in Figure 5.12, the noise current of the feedback resistor is injected into node A and drawn out of the output node. As such, the input- referred noise is the difference of the input-referred expressions for sources and given in Equations (5.20) and (5.22): Total Input-Referred Noise Combining the effects of all the independent noise components, we obtain the total input-referred noise current density of the optical preamplifier: where I n3b 2 I nRfin = 2 I ni ⎛ sCin ⎞ ⎛ 1 ⁄ gm2 + R f 1 ⎞ ⎜1+ ------------------------ ⎟ – ⎜---------------------------------------- × ------------------------------ ⎟ ⎝ + ⎠ ⎝1⁄ gm2 – K cmR f 1 + sRoutC L⎠ = g m1 2 I n2in g s1 2 I n2bin are the constituent parameters. 2 I n3in 2 I n3bin + + + + C in 2 I nRfin 2 I ni( s) = 2 I n2 + 1 + s------------------------ gm1 + gs1 2 × I n2b ⎛ 1 ⁄ gm2 + R f ⎞ 1 + ⎜---------------------------------------- ⎟ × ------------------------------ ⎝1⁄ gm2 – K cmR f ⎠ 1 + sRoutC L 2 I n1 2 I n2( b) R out 2 2 2 I n3 2 × 2 I nRf 2 I n3b × ( + ) Cin ⎛ 1 ⁄ gm2 + R f ⎞ 1 + 1 + s------------------------ – ⎜---------------------------------------- ⎟ × -----------------------------gm1 + gs1 ⎝1⁄ gm2 – K cmR f ⎠ 1 + sRoutC L = γ 4kTg m1 = γ 4kTgm2 ( b) 1 ⁄ gm2 + R f = ------------------------------ 1 + K cm 2 I n3( b) = γ 4kTgm3 ( b) 2 4kT I nRf = --------- R f I n2b (5.23) (5.24) 2 ×
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CMOS Optical Preamplifier Design Us
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To achieve low-voltage operation, w
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Table of Contents CHAPTER 1 INTRODU
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CHAPTER 1 1.1 OVERVIEW Introduction
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Information Source Modulator Drive
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1.2 Thesis Outline 5 [Ohhata,1999].
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1.2 Thesis Outline 7 technique call
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1.2 Thesis Outline 9 Detector in St
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E e + - V bias 2.1 Photodetectors 1
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Diode Capacitance (pF) Diode capaci
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2.2 Optical Preamplifier Structures
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2.3 Transimpedance Amplifier Design
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I dc 2.3 Transimpedance Amplifier D
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Source Figure 2.11 General structur
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A = = For = 1V , the solution is v
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The gain of the forward amplifier c
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Feedback Analysis Using Return Rati
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2.4 Circuit Analysis Techniques 33
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2.5 An Overview of Signal-Flow Grap
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1 x1 x2 2.5 An Overview of Signal-F
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2.6 SUMMARY REFERENCES • ∆ k =
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Symp. Circuits Systems, vol. 3, pp.
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CHAPTER 3 New Transimpedance Amplif
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3.1 A Differential Transimpedance A
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3.2 A Feedback Topology for Ambient
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3.2 A Feedback Topology for Ambient
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Transimpedance (dBΩ) 90 80 60 40
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3.3 A Low-Voltage Transimpedance Am
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C 3 Φ1VB M 3 V B- =0.7V M 7 Figure
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Page 77 and 78: 3.4 SUMMARY 3.4 Summary 71 In this
Page 79 and 80: 3.4 Summary 73 Y. Nakagome et al.,
Page 81 and 82: 4.1 Introduction 75 back topology o
Page 83 and 84: 4.2 Circuit Analysis Using Driving-
Page 91 and 92: 4.3 DPI/SFG: Combining DPI Analysis
Page 93 and 94: 4.4 Determining Port Impedances 87
Page 95 and 96: v i R in v o R out 4.4 Determining
Page 97 and 98: id » ro and 1 ⁄ rid « Av ⁄ ro
Page 103 and 104: Z b r e g m 4.5 Analyzing Transisto
Page 105 and 106: 4.5 Analyzing Transistor Circuits 9
Page 107 and 108: Figure 4.25 SFG for the source foll
Page 115 and 116: 5.1 Analysis of the Low-Voltage Tra
Page 117 and 118: 5.1 Analysis of the Low-Voltage Tra
Page 119 and 120: 5.2 DEVELOPING AN ANALYTIC CIRCUIT
Page 121 and 122: Z in 5.2 Developing an Analytic Cir
Page 123 and 124: 5.2 Developing an Analytic Circuit
Page 125 and 126: I n1 : i in I n2 -I n1 i scin ( sCi
Page 127: 5.2 Developing an Analytic Circuit
Page 131 and 132: DC transimpedance gain: Pole locati
Page 133 and 134: Frequency (MHz) 500 450 400 350 300
Page 135 and 136: Pole frequencies(MHz) 500 450 400 3
Page 137 and 138: Optimizing Sensitivity 5.2 Developi
Page 139 and 140: 5.2 Developing an Analytic Circuit
Page 141 and 142: Transimpedance Volts dB (lin) Gain
Page 143 and 144: CHAPTER 6 Implementation and Experi
Page 145 and 146: 6.1 A 1V Optical Receiver Front-End
Page 149 and 150: 6.1.2 Experimental Results 6.1 A 1V
Page 151 and 152: Gain(dB) 0 −1 −2 −3 −4 −5
Page 159 and 160: Clock signal of voltage doubler Eye
Page 161 and 162: 6.2 Variable-Gain Transimpedance Am
Page 163 and 164: 6.2.2 Experimental Results 6.2 Vari
Page 165 and 166: 6.3 Summary and State-of-the-Art Co
Page 167 and 168: Reference Outputs Technology Supply
Page 169 and 170: CHAPTER 7 Conclusions 7.1 SUMMARY A
Page 171 and 172: 7.2 Future Work 165 The significanc
Page 173 and 174: 7.2 Future Work 167 supply and subs
Page 175 and 176: v s i ti that part of the SFG for Q
Page 177 and 178: Thus, P1 ′ = b = 500Ω ∆1 ′
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itive representation of circuit dyn
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Bipolar Transistor i scb Z b v b b
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CMOS Optical Preamplifier Design Using Graphical Circuit Analysis

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