22.01.2013 Views

3D Time-of-flight distance measurement with custom - Universität ...

3D Time-of-flight distance measurement with custom - Universität ...

3D Time-of-flight distance measurement with custom - Universität ...

SHOW MORE
SHOW LESS

Create successful ePaper yourself

Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.

DEMODULATION PIXELS IN CMOS/CCD 109<br />

and the necessary correction <strong>of</strong> the measured data appear to be impractical.<br />

Summarizing, the 4-tap pixel approach is only partly suited to range <strong>measurement</strong>s,<br />

since, for modulation frequencies higher than 1 MHz, it suffers from transfer<br />

inhomogeneities between the single transfer gates.<br />

5.1.3 1-tap lock-in pixel<br />

Both pixel concepts introduced so far suffer from a low optical fill factor. In-pixel<br />

storage always occupies space, in proportion to the number <strong>of</strong> sampling points to<br />

be stored. The multitap approach only works up to 1MHz modulation frequency<br />

(realized <strong>with</strong> 4 storage sites) because the demodulation process happens in the<br />

extended area <strong>of</strong> a CCD line <strong>with</strong> design-rule-limited long CCD gates. The four-tap<br />

lock-in pixel accesses the photogate <strong>with</strong> four different transfer gates, resulting in<br />

an inhomogeneous response <strong>of</strong> the four sampling points. All <strong>of</strong> these limitations can<br />

be traced back to the requirement <strong>of</strong> realizing four independent in-pixel storage<br />

sites. The one-tap lock-in pixel ignores this requirement and <strong>of</strong>fers only one storage<br />

site but attempts to maximize the fill factor. Therefore, the sampling points have to<br />

be stored externally.<br />

Figure 5.6 shows the layout and a cross-sectional view (including the potential<br />

distribution in the semiconductor) <strong>of</strong> the 1-tap pixel. The left and the right light<br />

sensitive photogates (PGL and PGR) have a length <strong>of</strong> 6 µm, the middle photogate<br />

a length <strong>of</strong> 2.5 µm; the pixel width is 21 µm. Each pixel also includes a reset<br />

transistor, a source follower transistor (buffer amplifier) and the select transistor<br />

(cascode <strong>with</strong> source follower). This leads to a pixel size <strong>of</strong> 65 µm by 21 µm and an<br />

optical fill factor <strong>of</strong> more than 20%. The pixel’s working principle is illustrated in<br />

Figure 5.7: By applying proper gate voltages to the photogates, the potential<br />

gradient in the semiconductor can be influenced (c.f. Chapter 3). If the control<br />

voltages <strong>of</strong> the photogates are changed synchronously <strong>with</strong> the modulated<br />

incoming light, optically generated charge carriers can either be integrated (if they<br />

belong to the sampling interval) or they are dumped to the dump diffusion (if they<br />

do not belong to the sampling interval). This process can be repeated until the<br />

integration gate (IG) has accumulated a sufficiently large signal. The addition or<br />

accumulation <strong>of</strong> single electrons under the integration gate is essentially noise free.<br />

This sampling mechanism is shown in Figure 5.7 (a), whereas (b) describes the

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!