3D Time-of-flight distance measurement with custom - Universität ...
3D Time-of-flight distance measurement with custom - Universität ...
3D Time-of-flight distance measurement with custom - Universität ...
Create successful ePaper yourself
Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.
SOLID-STATE IMAGE SENSING 73<br />
3.2 Charge coupled devices: CCD - basic principles<br />
The underlying physical structure for charge-coupled devices is the MOS diode in<br />
deep depletion (see Section 3.1.2 for details). The operation sequence <strong>of</strong> CCD<br />
devices is to integrate optically generated charge carriers (photoelectrons) locally<br />
and to bundle them into charge packets in each pixel. The charge carriers are then<br />
physically transported to one output stage by a clever sequence <strong>of</strong> charging and<br />
discharging neighboring photogates. Each pixel-charge packet is subsequently<br />
transferred to the output stage, where it is converted into an analog voltage at the<br />
output.<br />
Collected charge<br />
Coupling two wells<br />
First well collapses<br />
Charge transferred<br />
A<br />
0 V<br />
0 V<br />
0 V<br />
0 V<br />
B<br />
10 V<br />
0 V<br />
0 V<br />
10 V 10 V 0 V<br />
5 V 10 V 0 V<br />
Figure 3.17 Charge transport in charge-coupled devices. [HEK].<br />
The CCD-transport mechanism, first demonstrated by Boyle, Smith, Amelio and<br />
Tompsett [BOY, AME], is illustrated in Figure 3.17. After an integration period in<br />
which the charge is collected under the only biased CCD-gate B, in a first step the<br />
neighboring gate C is biased to the same potential as gate B. Thus the two<br />
potential wells merge to one and the charge will equally distribute under both gates<br />
due to self induced coulomb drift and thermal diffusion. This process is called<br />
charge-coupling. In the next step the bias voltage <strong>of</strong> gate B is decreased and the<br />
potential well under this gate collapses. This results in the transport <strong>of</strong> the complete<br />
charge packet towards gate C. By repeating these steps the charge can be moved<br />
through the semiconductor. This transport mechanism works <strong>with</strong> a very high<br />
efficiency, the so-called charge transfer efficiency CTE. The CTE is defined as the<br />
0 V<br />
C<br />
10 V<br />
D<br />
0 V