3D Time-of-flight distance measurement with custom - Universität ...
3D Time-of-flight distance measurement with custom - Universität ...
3D Time-of-flight distance measurement with custom - Universität ...
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80 CHAPTER 3<br />
<strong>with</strong>out causing short circuits. Actually, the first CCDs [BOY, AME] were produced<br />
as one poly CCDs. Other successful implementations <strong>of</strong> CCDs <strong>with</strong> inter-poly gaps<br />
are reported in [HOP], [FUR] and [KRA]. In most CMOS processes, however, it is<br />
not possible to realize two neighboring gates <strong>with</strong>out highly doped implant between<br />
the gates (see Figure 3.22 a and b). Only a few processes <strong>of</strong>fer special masks<br />
(“non active implant” masks) to prohibit such a diffusion between the MOS gates<br />
(Figure 3.22 d and e). Only if, additionally, the gap between the gates is small<br />
enough (only a hundred to a few hundred nanometers) will the potential barrier<br />
(Figure 3.22 c) disappear and a charge transfer become possible (Figure 3.22 f).<br />
Today such CCDs <strong>with</strong> inter-poly gaps still require special processes but, <strong>with</strong> the<br />
predictable future decrease in minimum feature size, sufficiently small inter-poly<br />
gaps will become available and allows the implementation <strong>of</strong> CCDs <strong>with</strong> pure<br />
CMOS processes. However, most <strong>of</strong> today’s CMOS processes only <strong>of</strong>fer silicide<br />
poly-layers for improved conductivity. Silicide gates are opaque and therefore not<br />
suited for the realization <strong>of</strong> photogates.<br />
The Orbit 2.0µm CMOS/CCD process additionally allows the realization <strong>of</strong><br />
overlapping polys over thin oxide, and hence makes possible the realization <strong>of</strong><br />
SCCDs. Also, as an option, a buried channel implant is available, which allows<br />
BCCD realization. However, according to our <strong>measurement</strong>s, the Orbit BCCDs are<br />
only slightly better than the SCCDs. The Orbit 2.0µm CMOS/CCD process is<br />
primarily a CMOS process, i.e. optimized for transistor structures rather than for<br />
CCDs.<br />
CCDs require relatively high control voltages to completely deplete the<br />
semiconductor (in the case <strong>of</strong> SCCDs). Also the voltage amplitude defines the<br />
charge-handling capability and hence the maximum signal amplitude (dynamic) that<br />
the device can handle. Since many CCD gates are connected, the total gate<br />
capacitance is <strong>of</strong>ten in the range <strong>of</strong> some nan<strong>of</strong>arads. Therefore, not only high<br />
voltages but also high power is necessary to control CCD imagers, a serious<br />
drawback for battery-powered systems. Charging and discharging the CCD gates<br />
can require up to several amperes for some 10 MHz clocking speed.