3D Time-of-flight distance measurement with custom - Universität ...

SOLID-STATE IMAGE SENSING 79
could possibly cause gate breakthroughs. The second poly layer is offered only to
realize poly-poly capacitors only on top of the thick field oxide instead of the thinner
gate oxide. With a typical field oxide thickness of 0.6 µm (in contrast to 0.04 µm
gate oxide) the voltage on the polysilicon plate over the field oxide has nearly no
influence on the semiconductor potential. For this reason most CMOS processes
are not suitable for realizing CCDs with overlapping poly (see Figure 3.21 a). The
Orbit CMOS/CCD process allows the overlap of both poly layers over thin gate
oxide and thus enables the realization of surface channel CCDs with overlapping
polys (see Figure 3.21 b and c).
(a)
(b)
(c)
potential
poly gate
gate oxide (thin)
substrate
5V
diffusion
Standard CMOS transistor
(2 transistors in series)
10V
gap too large,
charge transport
is not possible
metal-wire
field oxide (thick)
Inter-poly gap CCD in CMOS
(no diffusion between the gates)
potential
5V
10V
gap small enough,
charge transport
is possible
Figure 3.22 SCCD realization with a one-poly MOS process:
Inter-poly-gap SCCD.
Generally, CCDs can also be realized in a technology with only one poly layer.
However, that the gap between two neighboring gates must be made small enough
(d)
(e)
(f)