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3D Time-of-flight distance measurement with custom - Universität ...

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152 CHAPTER 6<br />

6.1 Camera electronics<br />

6.1.1 Digital sequencer board<br />

The task <strong>of</strong> the digital sequence unit is to generate bit patterns that control both the<br />

TOF-sensor chip and the modulated illumination unit. Since no delay lines are<br />

used, the four phase relations between sensor timing and illumination timing (0°,<br />

90°, 180°, 270° and 1 st to 4 th sampling point respectively), have to be generated<br />

digitally. For our targeted modulation frequency <strong>of</strong> 20 MHz we therefore need<br />

flexible digital circuitry that can be operated at 80 MHz and beyond.<br />

One possible solution is the realization <strong>of</strong> a RAM-based sequencer, where a<br />

complete bit-pattern is loaded into a memory, which is then repeatedly read out at<br />

80 MHz frequency (Tbit=12.5 ns). Assuming a 5 Hz frame rate (Tframe=200 ms),<br />

however, a memory size <strong>of</strong> 2 megabytes per digital channel (200 ms/12.5 ns<br />

=16,000,000 bit) would be necessary, i.e. 48 megabytes for 24 channels<br />

(@ 80 MHz and 200 ms frames). Such a RAM-based sequencer solution is surely<br />

possible but appears rather overkill for the required task. Also the generation and<br />

download <strong>of</strong> 48-megabyte bit patterns into the RAM would be time consuming and<br />

complicated.<br />

A closer look at the required timing shows that the necessary bit patterns actually<br />

contain far less information than 48 MB. The reason why such a large memory<br />

would be necessary is the quickly alternating modulation signal <strong>of</strong> 20 MHz<br />

frequency at four different phase relations. All other signals, such as those for<br />

addressing, reset, readout and frame synchronization <strong>of</strong> the external A/D converter,<br />

are slower (

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