3D Time-of-flight distance measurement with custom - Universität ...
3D Time-of-flight distance measurement with custom - Universität ...
3D Time-of-flight distance measurement with custom - Universität ...
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118 CHAPTER 5<br />
charge already integrated, it will be possible for charge carriers integrated under IG<br />
to be transported back into the light sensitive pixel area and to be dumped to the<br />
dump diffusion. The maximum charge to be integrated <strong>with</strong>in the pixel is defined by<br />
the output stage. The conversion capacitance <strong>of</strong> 40 fF, together <strong>with</strong> the<br />
amplification <strong>of</strong> 0.9 and a maximum output voltage swing <strong>of</strong> 4 V, leads to a<br />
maximum number <strong>of</strong> about 1,100,000 electrons that can be integrated <strong>with</strong>out<br />
causing signal clipping due to saturation <strong>of</strong> the output stage.<br />
To determine the charge that leads to saturation <strong>of</strong> the output stage, we bias the<br />
gates PGM and PGR <strong>with</strong> 10 V (so that they are definitely at a higher potential than<br />
PGL) and use PGL as a variable barrier. In this way the potential difference<br />
between PGL and IG adjusts the amount <strong>of</strong> charge that IG can hold (c.f.<br />
Figure 5.9). The integration gate IG is always biased at 10.7 V, a reliable amplitude<br />
that avoids device damage by oxide break through. The illumination time is chosen<br />
to be long enough that the potential well, generated by the potential difference<br />
between IG and PGL, is always totally filled. Additionally generated charge carriers<br />
can no longer be held by IG.<br />
As the result <strong>of</strong> this <strong>measurement</strong> we find that a potential-difference <strong>of</strong> 2.2 V<br />
between IG and PGL defines the full-well charge that leads to saturation <strong>of</strong> the<br />
output stage (IG=10.7 V, PGL=8.5 V). For lower PGL voltages (e.g. 8 V) the output<br />
signal does not increase further, because the amount <strong>of</strong> charge that will be<br />
integrated then leads to saturation <strong>of</strong> the output stage. For higher PGL voltages<br />
(e.g. 9 V), the output signal decreases, because the full-well charge is smaller than<br />
the maximum charge that the output stage can handle. Therefore, the amplitude <strong>of</strong><br />
PGL should not exceed 8.5 V for the demodulation application (assuming<br />
IG = 10.7 V). Otherwise, the maximum signal that can be handled is no longer<br />
limited by the output stage but by the actual potential difference between IG and<br />
PGL.