23.04.2013 Views

TMPM330 - Keil

TMPM330 - Keil

TMPM330 - Keil

SHOW MORE
SHOW LESS

Create successful ePaper yourself

Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.

Under development<br />

10.6 Data Transfer Procedure in the I 2 C Bus Mode<br />

10.6.1 Device Initialization<br />

<strong>TMPM330</strong> (rev 0.4) 10-19<br />

<strong>TMPM330</strong><br />

First, program SBIxCR1 by writing “0” to bits 7 to 5 and bit 3 in SBIxCR1.<br />

Next, program SBIxI2CAR by specifying a slave address at and an address<br />

recognition mode at . ( must be set to”0” when using the addressing format).<br />

Then program SBIxCR2 to initially configure the SBI in the slave receiver mode by writing<br />

“0” to , “1” to , “10” to and “0” to bits 1 and 0.<br />

7 6 5 4 3 2 1 0<br />

SBIxCR1 ← 0 0 0 X 0 X X X Specifies ACK and SCL clock.<br />

SBIxI2CAR ← X X X X X X X X Specifies a slave address and an address recognition<br />

mode.<br />

SBIxCR2 ← 0 0 0 1 1 0 0 0 Configures the SBI as a slave receiver.<br />

(Note) X: Don’t care<br />

10.6.2 Generating the Start Condition and a Slave Address<br />

Master mode<br />

In the master mode, the following steps are required to generate the start condition<br />

and a slave address.<br />

First, ensure that the bus is free ( = “0”). Then, write “1” to SBIxCR1 to<br />

select the acknowledgment mode. Write to SBIxDBR a slave address and a direction<br />

bit to be transmitted.<br />

When = “0,” writing “1111” to SBIxCR2 generates the<br />

start condition on the bus. Following the start condition, the SBI generates nine clocks<br />

from the SCL pin. The SBI outputs the slave address and the direction bit specified at<br />

SBIxDBR with the first eight clocks, and releases the SDA line in the ninth clock to<br />

receive an acknowledgment signal from the slave device.<br />

The INTSBIx interrupt request is generated on the falling of the ninth clock, and <br />

is cleared to ”0.” In the master mode, the SBI holds the SCL line at the “L” level while<br />

is “0.” changes its value according to the transmitted direction bit at<br />

generation of the INTSBIx interrupt request, provided that an acknowledgment signal<br />

has been returned from the slave device.<br />

Settings in main routine<br />

7 6 5 4 3 2 1 0<br />

Reg. ← SBISR<br />

Reg. ← Reg. e 0x20<br />

if Reg.<br />

Then<br />

≠ 0x00 Ensures that the bus is free.<br />

SBIxCR1 ← X X X 1 0 X X X Selects the acknowledgement mode.<br />

SBIxDR1 ← X X X X X X X X Specifies the desired slave address and direction.<br />

SBIxCR2 ← 1 1 1 1 1 0 0 0 Generates the start condition.<br />

Example of INTSBI0 interrupt routine<br />

Clears the interrupt request.<br />

Processing<br />

End of interrupt<br />

Serial Bus Interface (SBI)

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!