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TMPM330 - Keil

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ADREG08L<br />

ADREG08H<br />

ADREG19L<br />

ADREG19H<br />

Under development<br />

Lower A/D Conversion Result Register 08<br />

<strong>TMPM330</strong> (rev 0.4) 13-9<br />

<strong>TMPM330</strong><br />

7 6 5 4 3 2 1 0<br />

Bit symbol ADR01 ADR00 OVR0 ADR0RF<br />

Read/Write R R R R<br />

After reset 0 1 0 0<br />

Function Store lower 2 bits of<br />

A/D conversion result<br />

“1” can be read.<br />

Over RUN<br />

flag<br />

0:<br />

A/D<br />

conversion<br />

result<br />

Not storage flag<br />

generate 1:Presence<br />

1: Generate of<br />

conversion<br />

result<br />

Upper A/D Conversion Result Register 08<br />

7 6 5 4 3 2 1 0<br />

Bit symbol ADR09 ADR08 ADR07 ADR06 ADR05 ADR04 ADR03 ADR02<br />

Read/Write R<br />

After reset 0<br />

Function Store upper 8 bits of A/D conversion result<br />

Lower A/D Conversion Result Register 19<br />

7 6 5 4 3 2 1 0<br />

Bit symbol ADR11 ADR10 OVR1 ADR1RF<br />

Read/Write R R R R<br />

After reset 0 1 0 0<br />

Function Store lower 2 bits of<br />

A/D conversion result<br />

“1” can be read.<br />

Over RUNflag<br />

0: Not<br />

generate<br />

1: Generate<br />

A/D<br />

conversion<br />

result storage<br />

flag<br />

1:Presence of<br />

conversion<br />

result<br />

Upper A/D Conversion Result Register 19<br />

7 6 5 4 3 2 1 0<br />

Bit symbol ADR19 ADR18 ADR17 ADR16 ADR15 ADR14 ADR13 ADR12<br />

Read/Write R<br />

After reset 0<br />

Function Store upper 8 bits of A/D conversion result<br />

Converted channel x value<br />

9 8 7 6 5 4 3 2 1 0<br />

ADREGxH ADREGxL<br />

7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0<br />

• Values of ADREG08L/ADREG19L read from bits 5 through 2 are always "1".<br />

• Bit 0 of ADREG08L/ADREG19L is the A/D conversion result storage flag . This bit is set to "1"<br />

after an A/D converted value is stored. A read of a lower register (ADREGxL) will set this bit to "0".<br />

• Bit 1 of ADREG08L/ADREG19L is the over RUN flag . This bit is set to "1" if a conversion result is<br />

overwritten before both conversion result storage registers (ADREGxH and ADREGxL) are read. A read of a<br />

flag will clear this bit to "0."<br />

• To read from conversion result storage registers, first read upper registers and then lower registers.<br />

Fig. 13-8 A/D Conversion Result Register<br />

Analog/ Digital Converter

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