TMPM330 - Keil

13.4.5 High-priority Conversion Mode
Under development
TMPM330 (rev 0.4)13 -22
TMPM330
By interrupting ongoing normal A/D conversion, top-priority A/D conversion can be
performed. Top-priority A/D conversion can be software activated by setting
ADMOD2 to "1" or it can be activated using the HW resource by setting
ADMOD3 to an appropriate setting. If top-priority A/D conversion has been
activated during normal A/D conversion, ongoing normal A/D conversion is interrupted,
and single conversion is performed for a channel designated by ADMOD2. The
result of single conversion is stored in ADREGSP, and the top-priority A/D conversion
interrupt is generated. After top-priority A/D conversion is completed, normal A/D
conversion is resumed; the status of normal A/D conversion immediately before being
interrupted is maintained. Top-priority A/D conversion activated while top-priority A/D
conversion is under way is ignored.
For example, if channel repeat conversion is activated for channels AN0 through AN8
and if is set to "1" during AN3 conversion, AN3 conversion is suspended,
and conversion is performed for a channel designated by . After the result
of conversion is stored in ADREGSP, channel repeat conversion is resumed, starting
from AN3.
13.4.6 A/D Monitor Function
If ADCMPx is set to "1," the A/D monitor function is enabled. If the value of
the conversion result storage register specified by REGS becomes larger or
smaller ("larger" or "smaller" to be designated by ADOBIC) than the value of a
comparison register, the A/D monitor function interrupt is generated. This comparison
operation is performed each time a result is stored in a corresponding conversion result
storage register, and the interrupt is generated if the conditions are met. Because storage
registers assigned to perform the A/D monitor function are usually not read by software,
overrun flag is always set and the conversion result storage flag is
also set. To use the A/D monitor function, therefore, a flag of a corresponding conversion
result storage register must not be used.
13.4.7 Storing and Reading A/D Conversion Results
A/D conversion results are stored in upper and lower A/D conversion result registers for
normal A/D conversion (ADREG08H/L through ADRG7FH/L).
In fixed channel repeat conversion mode, A/D conversion results are sequentially stored
in ADREG08H/L through ADREG7FH/L. If is so set as to generate the interrupt
each time one A/D conversion is completed, conversion results are stored only in
ADREG08H/L. If is so set as to generate the interrupt each time four A/D
conversions are completed, conversion results are sequentially stored in ADREG08H/L
through ADREG3BH/L.
Table 13-2 shows analog input channels and related A/D conversion result registers.
Analog/ Digital Converter