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TMPM330 - Keil

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Under development<br />

Table 17-6 Transfer Format for the RAM Transfer Command<br />

Byte Data Transferred from the Controller<br />

to the <strong>TMPM330</strong><br />

Boot ROM 1 byte Serial operation mode and baud rate<br />

For UART mode 86H<br />

For I/O Interface mode 30H<br />

<strong>TMPM330</strong> (rev 0.4)17-19<br />

<strong>TMPM330</strong><br />

Baud rate Data Transferred from the <strong>TMPM330</strong><br />

to the Controller<br />

Desired baud<br />

rate (Note 1)<br />

2 byte - ACK for the serial operation mode byte<br />

For UART mode<br />

-Normal acknowledge 86H<br />

(The boot program aborts if the baud rate<br />

can not be set correctly.)<br />

For I/O Interface mode<br />

-Normal acknowledge 30H<br />

3 byte Command code (10H) -<br />

4 byte - ACK for the command code byte (Note 2)<br />

-Normal acknowledge 10H<br />

-Negative acknowledge × 1H<br />

-Communication error × 8H<br />

5 byte - Password sequence (12 bytes)<br />

-<br />

16 byte (0x3F8F_FFF4∼0x3F8F_FFFF)<br />

17 byte Check SUM value for bytes 5 - 16 -<br />

18 byte - ACK for the checksum byte (Note 2)<br />

-Normal acknowledge 10H<br />

-Negative acknowledge x1H<br />

-Communication error x8H<br />

19 byte RAM storage start address 31 - 24 -<br />

20 byte RAM storage start address 23 - 16 -<br />

21 byte RAM storage start address 15 - 8 -<br />

22 byte RAM storage start address 7 - 0 -<br />

23 byte RAM storage byte count 15 - 8 -<br />

24 byte RAM storage byte count 7 - 0 -<br />

25 byte Check SUM value for bytes 19 - 24 -<br />

26 byte - ACK for the checksum byte (Note 2)<br />

-Normal acknowledge 10H<br />

-Negative acknowledge x1H<br />

-Communication error x8H<br />

27 byte<br />

∼<br />

m byte<br />

RAM storage data -<br />

m + byte Checksum value for bytes 27 - m -<br />

m + byte - ACK for the checksum byte (Note 2)<br />

-Normal acknowledge 10H<br />

-Negative acknowledge x1H<br />

-Communication error x8H<br />

RAM m + byte - Jump to RAM storage start address<br />

(Note 1) In I/O Interface mode, the baud rate for the transfers of the first and second bytes must be<br />

1/16 of the desired baud rate.<br />

(Note 2) In case of any negative acknowledge, the boot program returns to a state in which it waits<br />

for a command code (3rd byte). In I/O Interface mode, if a communication error occurs, a<br />

negative acknowledge does not occur.<br />

(Note 3) The 19th to 25th bytes must be within the RAM address range 0x2000_0400∼0x2000_7FFF.<br />

-<br />

Flash Memory Operation

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