TMPM330 - Keil

6.4.5 CG Interrupt Mode Control Register D
Under development
TMPM330 (rev0.4) 6-15
TMPM330
7 6 5 4 3 2 1 0
IMCGD bit Symbol EMCG82 EMCG81 EMCG80 EMST81 EMST80 INT8EN
Read/Write R R/W R R R/W
After reset 0 0 1 0 0 0 0 0
Function “0” is read. Active state setting of INTCECTX
standby clear request.
“0” is read. INTCECTX
Clear input
Set it as shown below.
010: Falling edge
Active state of
INTCECTX standby
clear request.
00: -
01: Rising edge
10: Falling edge
11: Both edges
0: Disable
1: Enable
15 14 13 12 11 10 9 8
bit Symbol
Read/Write R R/W R R/W
After reset 0 0 1 0 0 0 0 0
Function “0” is read. Write “0”. “0” is read. Write “0”.
23 22 21 20 19 18 17 16
bit Symbol
Read/Write R R/W R R/W
After reset 0 0 1 0 0 0 0 0
Function “0” is read. Write “0”. “0” is read. Write “0”.
31 30 29 28 27 26 25 24
bit Symbol
Read/Write R R/W R R/W
After reset 0 0 1 0 0 0 0 0
Function “0” is read. Write “0”. “0” is read. Write “0”.
(Note 1) Refer to EMSTxx bit to know the active condition which is used for clearing
standby.
(Note 2) Please specify the bit for the edge first and then specify the bit for the
. Setting them simultaneously is prohibited.
Interrupts