TMPM330 - Keil

11.2.3 CEC Enable Register [CECEN]
Under development
TMPM330 (rev0.4)11-3
TMPM330
7 6 5 4 3 2 1 0
bit Symbol ― I2CEC CECEN
Read/Write R R/W R/W
After reset 0 0 0
Function
“0” is read. CEC
operation
at IDLE
: Controls the CEC operation at the IDLE mode.
Set this bit to “1” when using CEC at the IDLE mode.
The and bits can be set simultaneously.
0:
Disabled
1:
Enabled
CEC
operation
0:
Disabled
1:
Enabled
: Specifies the CEC operation.
Enable CEC before using.
When the CEC operation is disabled, no clocks are supplied to the CEC module except
for the enable register. Thus power consumption can be reduced.
When CEC is disabled after it was enabled, each register setting is maintained.
11.2.4 Logical Address Register [CECADD]
bit Symbol CECADD
15
15 14 13 12 11 10 9 8
CECADD
14
CECADD
13
CECADD
12
CECADD
11
Read/Write R/W
After reset 0
Logical Logical Logical Logical Logical
Function address address address address address
15 14 13 12 11
bit Symbol
CECADD
10
Logical
address
10
CECADD
9
Logical
address
9
CECADD
8
Logical
address
8
7 6 5 4 3 2 1 0
CECADD
7
CECADD
6
CECADD
5
CECADD
4
CECADD
3
Read/Write R/W
After reset 0
Logical Logical Logical Logical Logical
Function address address address address address
7
6
5
4
3
CECADD
2
Logical
address
2
CECADD
1
Logical
address
1
CECADD
0
Logical
address
0
: Specifies the logical address assigned to CEC.
Multiple addresses can be set simultaneously since each bit corresponds with
each address.
(Note) A broadcast message is received regardless of the register setting.
By allocating a logical address of a device to 15, logical “0” is sent as an ACK
response to the broadcast message.
CEC