TMPM330 - Keil

Under development
8.3 Description of Operations for Each Circuit
TMPM330 (rev 0.4)8-18
TMPM330
The channels operate in the same way, except for the differences in their specifications as shown in Table 8-1
and 8-2. Therefore, the operational descriptions here are only for channel 0.
8.3.1 Prescaler
There is a 4-bit prescaler to generate the source clock for up-counter UC0. The prescaler input
clock φT0 is fperiph/1, fperiph/2, fperiph/4, fperiph/8, fperiph/16 or fperiph/32 selected by
SYSCR1 in the CG. The peripheral clock, fperiph, is either fgear, a clock selected by
SYSCR1 in the CG, or fc, which is a clock before it is divided by the clock gear.
The operation or the stoppage of a prescaler is set with TB0RUN where writing “1”
starts counting and writing “0” clears and stops counting. Table 8-5 and 8-6 show prescaler output
clock resolutions.
16-bit Timer/
Event Counters (TMRBs)