TMPM330 - Keil

Under development
TMPM330 (rev0.4)11-15
TMPM330
: Specifies the rising timing of a start bit.
Enables to set it for each sampling clock cycle between the ranges of 0 to -7 cycles
from default value (3.7 ms approx.).
: Specifies a cycle of a start bit.
Enables to set it for each sampling clock cycle between the ranges of 0 to -7
cycles from default value (4.5 ms approx.).
: Specifies the rising timing of a data bit.
Enables to set it for each sampling clock cycle between the ranges of 0 to -7 cycles
from default value (logical “1”: 0.6 ms approx., logical “0”: 1.5 ms approx.).
: Specifies a cycle of a data bit.
Enables to set it for each sampling clock cycle between the ranges of 0 to -15
cycles from default value (2.4 ms approx.).
: Set this bit to “1” when transmitting a broadcast message.
: Specifies time of a bus to be free that checked before transmission. Start
transmission after checking the CEC line kept inactive during the specified cycles.
CEC