TMPM330 - Keil

Under development
Table 6-1 List of Hardware Interrupt Factors (2/2)
No. Interrupt Factors
43 INTCAP20 16bit TMRB input capture 20
44 INTCAP21 16bit TMRB input capture 21
45 INTCAP30 16bit TMRB input capture 30
46 INTCAP31 16bit TMRB input capture 31
47 INTCAP40 16bit TMRB input capture 40
48 INTCAP41 16bit TMRB input capture 41
49 INTAD A/D conversion completion
6.2.5 Active State
TMPM330 (rev0.4) 6-4
Activation trigger
(Clearing standby)
Clock
Generator
TMPM330
The active state indicates which change in signal of an interrupt factor triggers an interrupt. The
CPU considers an interrupt signal as an interrupt factor when it is changed from “L” to “H”. A signal
directly sent from the peripheral IP to the CPU is configured to output the “H” as an interrupt
request.
The active state of the interrupt to clear the standby mode has the options. As for the signal from
the peripheral IP, the trigger is determined to be the rising or falling edges depending on the
interrupt factor. If the signal is from the external pin, the “H” level, “L” level, rising or falling edge is
selectable.
If the interrupt is used for clearing the standby mode, setting the clock generator register is
required. Enable the IMCGx bit and specify the active state in the IMCGx
bits. You must set the activation trigger as shown in Table 6-1.
The interrupt detected by the clock generator is notified to the CPU with a signal in “H” lelvel.
An interrupt from the external pin can be used without setting the clock generator if it does not
function as the clearing factor. However, inputting the “H” pulse or the signal in “H” level is required
so that the CPU can detect it as an interrupt factor.
Interrupts