TMPM330 - Keil

Block Address
(User boot mode)
Under development
Table 17-20 Block Erase Address Table
Address
(Single boot mode)
TMPM330 (rev 0.4)17-53
Size
Block4 0x0000_0000-0x0000_7FFF 0x3F80_0000-0x3F80_7FFF 32K byte
Block5 0x0000_8000-0x0000_FFFF 0x3F80_0000-0x3F80_FFFF 32K byte
Block3 0x0001_0000-0x0001_FFFF 0x3F81_0000-0x3F81_FFFF 64K byte
Block2 0x0002_0000-0x0003_FFFF 0x3F82_0000-0x3F83_FFFF 128K byte
Block1 0x0004_0000-0x0005_FFFF 0x3F84_0000-0x3F85_FFFF 128K byte
Block0 0x0006_0000-0x0007_FFFF 0x3F86_8000-0x3F87_FFFF 128K byte
TMPM330
Example: When BA0 is to be erased, any single address in the range 0x0000_0000 to
0x0000_7FFF or 0x3F80_0000 to 0x3F80_7FFF may be entered.
(Note) As for the addresses from the first to the fifth bus cycles, specify the upper 4
bit with the corresponding flash memory addresses of the blocks to be
erased.
Table 17-21 Protection Bit Programming Address Table
Block Protection
The seventh bus write cycle address [18:17] [10:9]
bit Address [18] Address [17] Address [10] Address [9]
Block0 BLPRO0 0 0 0 0
Block1 BLPRO1 0 0 0 1
Block2 BLPRO2 0 0 1 0
Block3 BLPRO3 0 0 1 1
Block4 BLPRO4 0 1 0 0
Block5 BLPRO5 0 1 0 1
Table 17-22 Protection Bit Erase Address Table
Block Protection
The seventh bus write cycle address [18:17]
bit Address [18] Address [17]
Block0~3 BLPRO0~3 0 0
Block4~5 BLPRO4~5 0 1
The protection bit erase command cannot erase by individual block.
Table 17-23 The ID-Read command's fourth bus write cycle ID address (IA) and
the data to be read by the following 32-bit data transfer command (ID)
IA [15:14] ID [7: 0 ] Code
00b 0x98
Manufacturer
code
01b 0x5A Device code
10b Reserved ---
11b 0x12 Macro code
Flash Memory Operation