TMPM330 - Keil

8.3.4 Capture
Under development
TMPM330 (rev 0.4)8-25
TMPM330
This is a circuit that controls the timing of latching values from the UC0 up-counter into the
TB0CP0 and TB0CP1 capture registers. The timing with which to latch data is specified by
TB0MOD .
Software can also be used to import values from the UC0 up-counter into the capture register;
specifically, UC0 values are taken into the TB0CP0 capture register each time “0” is written to
TB0MOD. To use this capability, the prescaler must be running
(TB0RUN = “1”).
8.3.5 Capture Registers (TB0CP0H/L, TB0CP1H/L)
These are 16-bit registers for latching values from the UC0 up-counter. To read data from the
capture register, use a 16-bit data transfer instruction or read in the order of low-order bits
followed by high-order bits.
8.3.6 Up-counter capture register (TB0UCH/L)
Other than the capturing functions shown above, the current count value of the UC0 can be captured
by reading the TB0UC registers.
8.3.7 Comparators (CP0, CP1)
These are 16-bit comparators for detecting a match by comparing set values of the UC0
up-counter with set values of the TB0RG0 and TB0RG1 timer registers. If a match is detected,
INTTB0 is generated.
8.3.8 Timer Flip-flop (TB0FF0)
The timer flip-flop (TB0FF0) is reversed by a match signal from the comparator and a latch
signal to the capture registers. It can be enabled or disabled to reverse by setting the
TB0FFCR.
The value of TB0FF0 becomes undefined after a reset. The flip-flop can be reversed by
writing “00” to TB0FFCR. It can be set to “1” by writing “01,” and can be cleared
to “0” by writing “10.”
The value of TB0FF0 can be output to the timer output pin, TB0OUT (shared with PI0). To
enable timer output, the port I related registers PICR and PIFR1 must be programmed
beforehand.
8.3.9 Capture interrupt (INTCAP00, INTCAP01)
Interrupts INTCAP00 and INTCAP01 can be generated at the timing of latching values from
the UC0 up-counter into the TB0CP0 and TB0CP1 capture registers. The interrupt timing is
specified by NVIC.
16-bit Timer/
Event Counters (TMRBs)