PXA3xx Design Guide - Marvell

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PXA3xx Processor FamilyDesign Guide15.4.1 Internal Pulldown ResistorsThe nominal value of the internal pulldown resistors internal to the PXA3xx processor family is 100KΩ. The recommendation is not to have external pullup resistors because the value needed tooverpower the internal pulldown resistance during S0/D2/C2 and S2/D3/C4 would consumeexcessive power during normal operation.15.4.2 Using the Keypad Signals to Wake-up from S0/D2/C2 andS2/D3/C4 ModeUsing the appropriate Multi-Function Pin register (MFPRx), the keypad pins can be configured tominimize power usage and to detect a key press during low power mode operation. The KP_DKINand KP_MKIN signals interfacing to the keypad controller must be configured with their pull-downresistors enabled and must be configured to detect a rising edge event. The KP_MKOUT signalsused to interface to a matrix keypad must be configured with their pull-ups enabled. Refer toMarvell ® PXA30x, PXA31x, and PXA32x Processors Vol. III: Graphics and Input ControllerConfiguration Developers Manual, “Section 5: Keypad Controller”.It is possible to use the keypad signals to wake up the PXA3xx processor family from S0/D2/C2 orS2/D3/C4 by configuring the “Application Subsystem Wake-Up From D2 To D0 state Enable register(AD2D0ER)” or “Application Subsystem Wake-Up From D3 Enable register (AD3ER)” registers.After wake-up, the “Application Subsystem Wake-Up From D2 to D0 Status register (AD2D0SR)” orthe “Application Subsystem Wake-Up From D3 Status register (AD3SR)” to determine what unitcaused the wake-up for low-power mode. The Power Manager Keyboard Edge-Detect Statusregister (PKSR) must be read to determine which GPIO corresponding to the keypad input signaldetected an edge transition. After this event, software must follow proper procedures to re-enablethe keypad registers (if required) and read the key that was pressed.15.4.3 How to Enable Specific Combinations of Direct KeysThe enabling bit field KPC[DKN] implies that all KP_DKIN signals must be enabled sequentiallyfrom KP_DKIN to KP_DKIN. This is true for this specific controller, but it is still possible not tomap any of the direct keypad signals to a specific ball on the PXA3xx processor family package byusing the PXA3xx processor family Multi-Function Pin register (MFPRx). By not mapping a specificdirect input signal to the PXA3xx processor family package, a value of zero is always read in and theinput is not left floating. A floating input causes excessive use of power.For a given configuration of the PXA3xx processor family GPIO, some direct key inputs are notconnected to the keypad interface if their corresponding GPIO pins are being used as inputs/outputsfor other functional blocks. For example:• GPIO pins corresponding to direct key inputs 2 and 3 are used as inputs/outputs for otherblocks and hence unavailable for the keypad interface. In such a case, the KP_DKIN inputsignals are guaranteed a logic 0 on them all the time, denoting no activity on direct keys 2 and3.• The rest of the direct keys, KP_DKIN and KP_DKIN, are utilized as inputs and areconnected to rotary encoders or direct keys. By specifying the number of direct keys in theKeypad Control register as 6 (KPC[DKN] = 0b101), a logic 0 on direct key inputs 2 and 3 isguaranteed and no activity is detected on them.For details about multi-function pin configuration, refer to Marvell ® PXA30x, PXA31x, and PXA32xProcessors Vol. III: Graphics and Input Controller Configuration Developers Manual, “Section 5:Keypad Controller”.15.4.4 Interfacing to a Matrix KeypadWhen interfacing to a matrix keypad, the KP_MKIN and KP_MKOUT signals must beconnected sequentially from KP_MKIN to KP_MKIN and from KP_MKOUT toDoc. No. MV-S301368-00 Rev. A Copyright © 2009 MarvellPage 128April 6, 2009, Released
KP_MKOUT. The number of columns in the keypad signifies the highest order KP_MKOUTsignal minus one to be used. For example, KP_MKOUT is the highest order KP_MKOUTsignal used with an eight-column keypad. The number of rows in the keypad signifies the highestorder KP_MKIN signal minus one to be used. For example, KP_MKIN is the highest orderKP_MKIN signal used with a five-row keypad.15.5 Modes of Operation OverviewThe following subsection show examples of how to use the keypad controller with one, two, or norotary encoders. Some example have different size matrix keypads.15.5.1 Keypad Matrix and Direct Keys and No Rotary EncoderThis example shows one of many possible configurations when interfacing to the PXA3xx processorfamily keypad controller. This specific configuration in Figure 54 shows the keypad controllerinterfaced to a 3 x 6 matrix keypad of 18 keys, 4 direct keys, and no rotary encoder. The voltagereference must be at the same level as the internal voltage domain of the keypad signals. Refer tothe Marvell ® PXA30x, PXA31x, and PXA32x Processor Electrical, Mechanical, and ThermalSpecification.Copyright © 2009 MarvellDoc. No. MV-S301368-00 Rev. AApril 6, 2009, Released Page 129
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PXA3xx Design Guide - Marvell

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