PXA3xx Design Guide - Marvell

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PXA3xx Processor FamilyDesign Guide20.3.1 USB Host Differential Connection (Port 1)See Figure 70 for USB host Port 1 differential connections of the PXA3xx processor family.Figure 70: USB Host (Port 1) Differential Connections Block DiagramPXA3xxProcessorUSB HostController - Port 1USBHPENCONTROL+5VVBUS1USB HostCableConnectorVBUS (+5 V)USBHPWR*USB PowerSwitch Circuitry(Required)FAULT4GNDUSBH1_PC PR SR PTermination,Filtering, andESD ProtectionCircuitry3USB D+USBH1_NR S(Optional)2USB D-*Note: USBHPWR can be used to detect faults for allthree host ports (Port 1, 2, 3)C PR PC P= 68 - 75 pFR S= 10 – 25 OhmsR P= 15 KOhmsUSBH_001_P220.3.2 USB Host Connections (Port 2)Host controller Port 2 is used with either single-ended connections or a differential connections, butnot in both at the same time.See Figure 71 for a USB host Port 2 single-ended connections. See Figure 72 for USB host Port 2differential connections of the PXA3xx processor family.Doc. No. MV-S301368-00 Rev. A Copyright © 2009 MarvellPage 166April 6, 2009, Released
Figure 71: PXA3xx Processor Family Host 2 Single-Ended Connections to External TransceiverUSB HostController123Transmit enableUSB_P2_4SPEEDVMOVPOD-D+USB DeviceControllerD+/D-UP2OCR[EXSP]Transmit enableUP2OCR[SE0S]USB_P2_6USB_P2_7USB_P2_2USB_P2_1OE_nRCVVPVMPXA3xx ProcessorUSB_P2_5USB_P2_3External USBTransceiverCopyright © 2009 MarvellDoc. No. MV-S301368-00 Rev. AApril 6, 2009, Released Page 167
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Copyright © 2009 MarvellDoc. No. M
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Figure 42: SPI Protocol Interface B
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TablesTable 1: How Design Guide Cha
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PXA3xx Processor FamilyDesign Guide
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PXA3xx Design Guide - Marvell

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