PXA3xx Design Guide - Marvell

7 Real-Time Clock Interface7.1 Overview7.2 SignalsThe real-time clock (RTC) interface of the PXA3xx processor family contains a single programmablesignal that is configured to generate a 1.0 Hz output signal. The configuration of the RTC isaccomplished through software and is described in detail in Marvell ® PXA30x, PXA31x, and PXA32xProcessors Vol. I: System and Timer Configuration Developers Manual, “Section 13: Real TimeClock (RTC)”.The RTC HZ_CLK output signal is implemented through the GPIOs. Therefore, the hardwareconsiderations that are necessary for the signal are the same as that of the GPIOs. Refer toMarvell ® PXA30x, PXA31x, and PXA32x Processors Vol. I: System and Timer ConfigurationDevelopers Manual, “Section 13: Real Time Clock (RTC)” for information regarding the properhardware implementation of the real-time clock signal.The RTC HZ_CLK output signal is implemented through the GPIOs of the PXA3xx processor family.Refer to the GPIO alternate function table in Marvell ® PXA30x, PXA31x, and PXA32x ProcessorsVol. I: System and Timer Configuration Developers Manual, “Section 4: Pin Descriptions andControl” for the GPIO assignments of the RTC HZ_CLK signal.See Table 14 for the description of the RTC HZ_CLK output signal, which is controlled by the RTCcontroller of the PXA3xx processor family.Table 14:RTC Interface Signal ListSignal Name Type DescriptionHZ_CLK Output 1 Hz clock generated by the RTC trimmer moduleCopyright © 2009 MarvellDoc. No. MV-S301368-00 Rev. AApril 6, 2009, Released Page 51