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PXA3xx Design Guide - Marvell

PXA3xx Design Guide - Marvell

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Table 78:Full Function UART Interface Signals (Continued)SignalNameDirectionDescriptionUART1_DTR Output Full function UART Data Terminal Ready (nDTR)UART1_RTS Output Full function UART Request to Send (nRTS)23.3.1.2 Full Function UART Block DiagramSee Figure 84 for a full function UART block diagram that shows the interface between the fullfunction UART and a standard 9-pin D-SUB-9 connector. The block diagram demonstrateshigh-level signal use and connectivity when using the full function UART.Figure 84: Full Function UART Interface Block Diagram<strong>PXA3xx</strong>ProcessorFull functionUARTD-SUB-9Serial CableConnectorUART1_DCD1UART1_DSR6UART1_RXD2UART1_RTSUART1_TXDUART1_CTSRS-232Transceiver783UART1_DTR4UART1_RI9523.3.1.3 Full Function UART Layout NotesThe RS-232 transceiver device converts CMOS logic voltage levels to RS-232 standard line voltagelevels. Locate the RS-232 transceiver close to the 9-pin D-SUB-9 connector.23.3.2 Bluetooth UARTBluetooth UARTs (UART2 and UART3) are high-speed UARTs and support baud rates of 9600, 19.2K, 38.4 K, 57.6 K, 115.2 K, 230 K, 460 K, 921 K, 1.8 M, and 3.6 M. UART2 and UART3 can beconnected to Bluetooth modules. The bluetooth UART only supports two modem control signals(nCTS, nRTS).Copyright © 2009 <strong>Marvell</strong>Doc. No. MV-S301368-00 Rev. AApril 6, 2009, Released Page 189

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