PXA3xx Design Guide - Marvell

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PXA3xx Processor FamilyDesign GuideTable 36:Multimedia Card/SD/SDIO Card Controller Interface Signal Summary (Continued)SignalDirection(MMC/SD/SDIO Mode)Direction(SPI Mode)DescriptionMM1_CMD Bidirectional Output MultiMediaCard Command—MMC/SD/SDIO Controller #1MMC and SD:bidirectional line for command and responsetokensSPI:output for command and write dataMM1_DAT0 Bidirectional Input MultiMediaCard Data 0—MMC/SD/SDIO Controller #1MMC and SD: Bidirectional line for read and write data.SPI: input for response token and read dataMM1_DAT1 Bidirectional Input MultiMediaCard Data 1—MMC/SD/SDIO Controller #1MMC and SD: Bidirectional line for read and write data.SDIO:Signals an interrupt condition to the controller.MM1_DAT2/MM1_CS0MM1_DAT3/MM1_CS1Bidirectional Output MultiMediaCard Data 2—MMC/SD/SDIO Controller #1MMC and SD: Bidirectional line for read and write data.MultiMediaCard Chip Select 0—MMC/SD/SDIO Controller #1SPI: Chip Select 0Bidirectional Output MultiMediaCard Data 3—MMC/SD/SDIO Controller #1MMC and SD: Bidirectional line for read and write data.MultiMediaCard Chip Select 1—MMC/SD/SDIO Controller #1SPI:chip select 1MMC/SD/SDIO Card Controller #2MM2_CLK Output Output MultiMediaCard and SD Card Bus Clock—MMC/SD/SDIOController #2MM2_CMD Bidirectional Output MultiMediaCard Command—MMC/SD/SDIO Controller #2MMC and SD:Bidirectional line for command and responsetokensSPI: Output for command and write dataMM2_DAT0 Bidirectional Input MultiMediaCard Data 0—MMC/SD/SDIO Controller #2MMC and SD: Bidirectional line for read and write data.SPI: Input for response token and read dataMM2_DAT1 Bidirectional Input MultiMediaCard Data 1—MMC/SD/SDIO Controller #2MMC and SD: Bidirectional line for read and write data.SDIO:Signals an interrupt condition to the controller.MM2_DAT2/MM2_CS0MM2_DAT3/MM2_CS1Bidirectional Output MultiMediaCard Data 2—MMC/SD/SDIO Controller #2MMC and SD: Bidirectional line for read and write data.MultiMediaCard Chip Select 0—MMC/SD/SDIO Controller #2SPI: Chip select 0Bidirectional Output MultiMediaCard Data 3—MMC/SD/SDIO Controller #2MMC and SD: Bidirectional line for read and write data.MultiMediaCard Chip Select 1—MMC/SD/SDIO Controller #2SPI: Chip select 1MultiMediaCard/SD/SDIO Controller #3 SignalsNOTE: MMC/SD/SDIO Card Controller #3 (PXA31x Processor Only)Doc. No. MV-S301368-00 Rev. A Copyright © 2009 MarvellPage 96April 6, 2009, Released
Table 36:Multimedia Card/SD/SDIO Card Controller Interface Signal Summary (Continued)SignalDirection(MMC/SD/SDIO Mode)Direction(SPI Mode)DescriptionMM3_CLK Bidirectional Output MultiMediaCard and SD Card Bus Clock—MMC/SD/SDIOController #3MM3_CMD Bidirectional Output MultiMediaCard Command—MMC/SD/SDIO Controller #3MMC and SD: Bidirectional line for command and responsetokensSPI: Ooutput for command and write dataMM3_DAT0 Bidirectional Input MultiMediaCard Data 0—MMC/SD/SDIO Controller #3MMC and SD: Bidirectional line for read and write data.SPI: Input for response token and read dataMM3_DAT1 Bidirectional Input MultiMediaCard Data 1—MMC/SD/SDIO Controller #3MMC and SD: Bidirectional line for read and write data.SDIO: Signals an interrupt condition to the controller.MM3_DAT2/MM3_CS0MM3_DAT3/MM3_CS1Bidirectional Output MultiMediaCard Data 2—MMC/SD/SDIO Controller #3MMC and SD: Bidirectional line for read and write data.MultiMediaCard Chip Select 0—MMC/SD/SDIO Controller #3SPI: Chip select 0Bidirectional Output MultiMediaCard Data 3—MMC/SD/SDIO Controller #3MMC and SD: Bidirectional line for read and write data.MultiMediaCard Chip Select 1—MMC/SD/SDIO Controller #3SPI: Chip select 112.3 Layout NotesEach PXA3xx processor family MMC/SD/SDIO controller is connected to MMC, SD, and SDIO carddevices, but there are limitations to which device type installs into which socket type. See Table 37for information on sockets and devices supported by the MMC/SD/SDIO controller.Table 37:MMC/SD/SDIO Controller Supported Sockets and DevicesSocketsSD/SDIO card socketMMC socketDevices SupportedSD card deviceSDIO card deviceMMC deviceMMC deviceCopyright © 2009 MarvellDoc. No. MV-S301368-00 Rev. AApril 6, 2009, Released Page 97
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Copyright © 2009 MarvellDoc. No. M
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Figure 42: SPI Protocol Interface B
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TablesTable 1: How Design Guide Cha
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PXA3xx Design Guide - Marvell

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