PXA3xx Design Guide - Marvell

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PXA3xx Processor FamilyDesign Guide22.6.2 Topology # 2: SDATA_OUT with Two LoadsFigure 81: Topology # 2-PXA3xx Processor Family SDATA_OUT to Two AC ‘97 CodecsTable 73:Topology # 2-PXA3xx Processor Family SDATA_OUT to Two AC ‘97 CodecsMode Section Maximum Length* Minimum Length1.8 V HDI_1 + BMS + HDI_2 2.5 inches 0.5 inches1.8 V HDI_1 + BMS + HD_I3 2.5 inches 0.5 inches3.3 V HDI_1 + BMS + HDI_2 7.0 inches 0.5 inches3.3 V HDI_1 + BMS + HDI_3 7.0 inches 0.5 inches• HDI should be used mainly for breakout. Maximum length on HDI_1, HDI_2 or HDI_3 is 0.5inches.Doc. No. MV-S301368-00 Rev. A Copyright © 2009 MarvellPage 184April 6, 2009, Released
22.6.3 Topology # 3: SDATA_IN with a Single LoadFigure 82: Topology # 3 - Primary Codec to PXA3xx Processor Family - SDATA_OUT (Single Load)Table 74:Topology # 3: AC97_SDATA_IN[1:0] (Single Load)Mode Section Maximum Length* Minimum Length1.8 V HDI_1 + BMS + HDI_2 7.0 inches 0.5 inches3.3 V HDI_1 + BMS + HDI_2 7.0 inches 0.5 inches• HDI should be used mainly for breakout. Maximum length on HDI_1 or HDI2 is 0.5 inches.• This topology is point-to-point with no stubs.• AC97_SDATA should be length matched to AC97_BITCLK to within ± 1.0 inch.Table 75:Topology # 3: AC97_BITCLK (Single Load)Mode Section Maximum Length* Minimum Length1.8 V HDI_1 + BMS + HDI_2 5.0 inches 0.5 inches3.3 V HDI_1 + BMS + HDI_2 7.0 inches 0.5 inches• HDI should be used mainly for breakout. Maximum length on HDI_1 or HDI2 is 0.5 inches.• This topology is point-to-point with no stubs.Copyright © 2009 MarvellDoc. No. MV-S301368-00 Rev. AApril 6, 2009, Released Page 185
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TablesTable 1: How Design Guide Cha
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PXA3xx Design Guide - Marvell

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