PXA3xx Design Guide - Marvell

More documents

Recommendations

Info

PXA3xx Processor FamilyDesign GuideFigure 86: Consumer Infrared Unit Connection ExamplePXA3xxProcessorCIR ControllerCIR_OUTR124.4 Layout NotesThe maximum specified switching speed of the CIR is 7.43 MHz, but applications use significantlylower carrier (switching) rates. For example, RC5 uses a 36 kHz carrier frequency. At this speed,degradation of signal integrity is not likely to occur. But, the use of the best possible design androuting practices is still encouraged.Follow these recommendations when routing signals to ensure the most reliable design possible:• Keep the signal trace as short as possible.• Route the signal with as much of the trace on an inner signal layer as possible.• The traces supplying power to the IR LED/drive transistor/current limit resistor should be sizedto accommodate the current driven through the IR LED.Doc. No. MV-S301368-00 Rev. A Copyright © 2009 MarvellPage 192April 6, 2009, Released
25 Pulse-Width Modulator Interface25.1 Overview25.2 SignalsThe PXA3xx processor family pulse-width modulator (PWM) interface contains four pins that can beconfigured to generate periodic output signals. Configuration of the PWMs is accomplished throughsoftware and is described in detail in Marvell ® PXA30x, PXA31x, and PXA32x Processors Vol. IV:Serial Controller Configuration Developers Manual, “Section 9: Pulse-Width Modulator Controller”.PWM signals are implemented through GPIOs. Therefore, the hardware considerations necessaryfor the PWM signals are the same as that of the GPIOs.The PWM signals are implemented through the GPIOs of the PXA3xx processor family. Refer to theGPIO alternate-function table in Marvell ® PXA30x, PXA31x, and PXA32x Processors Vol. I: Systemand Timer Configuration Developers Manual , “Section 5: General-Purpose I/O Unit” for the GPIOassignments of the PWM signals.See Table 81 for the list of signals controlled by the PWM controller of the PXA3xx processor family.Table 81:PWM Interface Signal ListSignal Name Type DescriptionPWM_OUT0 Output Pulse-width modulated output signal for PWM0PWM_OUT1 Output Pulse-width modulated output signal for PWM1PWM_OUT2 Output Pulse-width modulated output signal for PWM2PWM_OUT3 Output Pulse-width modulated output signal for PWM325.3 Block DiagramThe connection of the PWM to the peripheral device using the PWM is typically direct. However, ifthe PWM is used as a software-controlled voltage source, a low-pass filter must be placed in line. Anexample of a software controlled voltage source is for the contrast control on an LCD panel. If thePWM output is used for generating audio, an appropriate filter is also required. In this case, the filteris a band-pass filter.The specification and design of the filter depends on the exact purpose of the application. See theblock diagram for a design requiring a low-pass or band-pass filter in Figure 87.Copyright © 2009 MarvellDoc. No. MV-S301368-00 Rev. AApril 6, 2009, Released Page 193
Page 5 and 6:
10.2 Signals ......................
Page 7 and 8:
17.2 Signals ......................
Page 9 and 10:
26.2 Signals ......................
Page 11 and 12:
Copyright © 2009 MarvellDoc. No. M
Page 13 and 14:
Figure 42: SPI Protocol Interface B
Page 15:
TablesTable 1: How Design Guide Cha
Page 18 and 19:
PXA3xx Processor FamilyDesign Guide
Page 20 and 21:
Page 22 and 23:
Page 24 and 25:
Page 26 and 27:
Page 28 and 29:
Page 30 and 31:
Page 32 and 33:
Page 34 and 35:
Page 36 and 37:
Page 38 and 39:
Page 40 and 41:
Page 42 and 43:
Page 44 and 45:
Page 46 and 47:
Page 48 and 49:
Page 50 and 51:
Page 52 and 53:
Page 54 and 55:
Page 56 and 57:
Page 58 and 59:
Page 60 and 61:
Page 62 and 63:
Page 64 and 65:
Page 66 and 67:
Page 68 and 69:
Page 70 and 71:
Page 72 and 73:
Page 74 and 75:
Page 76 and 77:
Page 78 and 79:
Page 80 and 81:
Page 82 and 83:
Page 84 and 85:
Page 86 and 87:
Page 88 and 89:
Page 90 and 91:
Page 92 and 93:
Page 94 and 95:
Page 96 and 97:
Page 98 and 99:
Page 100 and 101:
Page 102 and 103:
Page 104 and 105:
Page 106 and 107:
Page 108 and 109:
Page 110 and 111:
Page 112 and 113:
Page 114 and 115:
Page 116 and 117:
Page 118 and 119:
Page 120 and 121:
Page 122 and 123:
Page 124 and 125:
Page 126 and 127:
Page 128 and 129:
Page 130 and 131:
Page 132 and 133:
Page 134 and 135:
Page 136 and 137:
Page 138 and 139:
Page 140 and 141:
Page 142 and 143: PXA3xx Processor FamilyDesign Guide
show all

PXA3xx Design Guide - Marvell

You also want an ePaper? Increase the reach of your titles

Delete template?

Save as template?