PXA3xx Design Guide - Marvell

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PXA3xx Processor FamilyDesign Guide13.2 Modes of Operation Overview.......................................................................................................................10613.2.1 Passive Color Mode........................................................................................................................10613.2.1.1 Signals..............................................................................................................................10613.2.1.2 Schematics / Block Diagram ............................................................................................10713.2.2 Active Color ....................................................................................................................................10813.2.2.1 Connecting to 16-Bit, 18-Bit, and 24-Bit Active LCD Panels ............................................10813.2.2.2 PXA3xx LCD Signals........................................................................................................10913.2.2.3 16bpp Schematics / Block Diagram .................................................................................11013.2.3 Active Color, 18bpp Mode ..............................................................................................................11013.2.3.1 Schematics / Block Diagram ............................................................................................11013.2.3.2 16-Bit to 18-Bit Data on Panel..........................................................................................11113.2.3.3 16-Bit to 24-Bit Data on Panel..........................................................................................11213.2.3.4 18-Bit to 24-Bit Data on Panel..........................................................................................11313.2.4 Layout Notes...................................................................................................................................11413.2.5 Smart Panel ....................................................................................................................................11413.2.5.1 Signals..............................................................................................................................11513.2.5.2 Schematics / Block Diagram ............................................................................................11613.3 Layout Notes .................................................................................................................................................11613.3.1 General LCD Routing Recommendations ......................................................................................11613.3.2 Recommended Layer Stack Up......................................................................................................11713.3.3 LCD Routing Recommendations ....................................................................................................11713.3.3.1 Single Load Designs ........................................................................................................11713.3.3.2 Dual Panel Display Designs .............................................................................................11814 Mini-LCD Controller...................................................................................................................12114.1 Overview .......................................................................................................................................................12114.2 Signals ..........................................................................................................................................................12115 Keypad Interface........................................................................................................................12315.1 Overview .......................................................................................................................................................12315.2 Signals ..........................................................................................................................................................12315.3 Block Diagram...............................................................................................................................................12415.4 Layout Notes .................................................................................................................................................12515.4.1 Internal Pulldown Resistors ............................................................................................................12615.4.2 Using the Keypad Signals to Wake-up from S0/D2/C2 and S2/D3/C4 Mode.................................12615.4.3 How to Enable Specific Combinations of Direct Keys.....................................................................12615.4.4 Interfacing to a Matrix Keypad ........................................................................................................12615.5 Modes of Operation Overview.......................................................................................................................12715.5.1 Keypad Matrix and Direct Keys and No Rotary Encoder................................................................12715.5.2 Keypad Matrix and Direct Keys with One Rotary Encoder .............................................................12916 Quick Capture Interface ............................................................................................................13116.1 Overview .......................................................................................................................................................13116.2 Signals ..........................................................................................................................................................13116.3 Block Diagram...............................................................................................................................................13216.4 Layout Notes .................................................................................................................................................13217 USB 1.1 Full Speed OTG and Device Controller (PXA30x processor or PXA32x processoronly)......................................................................................................................................13317.1 Overview .......................................................................................................................................................133Doc. No. MV-S301368-00 Rev. A Copyright © 2009 MarvellPage 6April 6, 2009, Released
17.2 Signals ..........................................................................................................................................................13317.3 Block Diagram...............................................................................................................................................13617.4 Layout Notes .................................................................................................................................................13717.4.1 Self-Powered Devices ....................................................................................................................13817.4.1.1 Operation if GPIOn and GPIOx are Different Pins ...........................................................13817.4.1.2 Operation if GPIOn and GPIOx are the Same Pin ...........................................................14017.4.2 Bus-Powered Device ......................................................................................................................14117.4.3 USB On-the-Go Transceiver Usage ...............................................................................................14117.4.4 Interface to External Transceiver (OTG).........................................................................................14317.4.5 Interface to External Charge Pump Device (OTG) .........................................................................14417.4.6 OTG ID ...........................................................................................................................................14517.4.7 Interface to External USB Transceiver (non-OTG) .........................................................................14618 USB High-Speed Device Controller (U2D) (PXA30x or PXA32x processor only) ................14918.1 Overview .......................................................................................................................................................14918.2 Signals ..........................................................................................................................................................14918.3 Block Diagram...............................................................................................................................................15018.4 Layout Notes .................................................................................................................................................15218.4.1 Signal Routing Guidelines ..............................................................................................................15218.4.1.1 Data Signals (Data 0 through Data 7)*.............................................................................15218.4.1.2 Control Signals (TXREADY, TXVALID, RXACTIVE, RXVALID, RXERROR)*.................15318.4.1.3 Clock* ...............................................................................................................................15318.4.2 Power Distribution Routing Guidelines ...........................................................................................15318.4.3 Power Decoupling Guidelines.........................................................................................................15419 USB High-Speed Controller (U2D) with OTG Functionality (PXA31x processor only) .......15519.1 OTG Usage ...................................................................................................................................................15519.2 ULPI Low-Power Mode .................................................................................................................................15719.3 ULPI Carkit Mode..........................................................................................................................................15719.4 Layout Notes .................................................................................................................................................15819.4.1 General Routing Recommendations...............................................................................................15820 USB 1.1 Host Interface ..............................................................................................................16120.1 Overview .......................................................................................................................................................16120.2 Signals ..........................................................................................................................................................16120.3 Block Diagrams .............................................................................................................................................16320.3.1 USB Host Differential Connection (Port 1)......................................................................................16420.3.2 USB Host Connections (Port 2) ......................................................................................................16420.3.3 USB Host Single-Ended Connections (Port 3) ...............................................................................16620.4 Layout Notes .................................................................................................................................................16721 SSP Port Interface .....................................................................................................................16921.1 Overview .......................................................................................................................................................16921.2 Signals ..........................................................................................................................................................169Copyright © 2009 MarvellDoc. No. MV-S301368-00 Rev. AApril 6, 2009, Released Page 7
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PXA3xx Design Guide - Marvell

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